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Irregular Loop Patterns Compilation on Distributed Shared Memory Multiprocessors

Mounir Hahad 1 Thierry Priol 2 Jocelyne Erhel 1
1 ALADIN - Algorithms Adapted to Intensive Numerical Computing
IRISA - Institut de Recherche en Informatique et Systèmes Aléatoires, INRIA Rennes
2 CAPS - Compilation, parallel architectures and system
IRISA - Institut de Recherche en Informatique et Systèmes Aléatoires, Inria Rennes – Bretagne Atlantique
Abstract : The Shared Virtual Memory (SVM) is an interesting layout that handles data storage, retrieval and communication. It affords a shared data programming paradigm on an architecture where the physical memory is actually distributed among several nodes. However, minimizing the false sharing and reducing the synchronization remain important issues for parallel efficiency, either at compile time for regular codes or at runtime for irregular ones. This paper addresses irregular loops compilation on Distributed Memory Parallel Computers (DMPCs) that run an SVM. Solutions are introduced to overcome the poor locality that exhibit irregular loops and a case study on an intel iPSC/2 and a Kendall Square KSR1 is presented.
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https://hal.inria.fr/inria-00074317
Contributor : Rapport de Recherche Inria <>
Submitted on : Wednesday, May 24, 2006 - 3:02:56 PM
Last modification on : Thursday, February 11, 2021 - 2:48:03 PM
Long-term archiving on: : Sunday, April 4, 2010 - 10:15:25 PM

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  • HAL Id : inria-00074317, version 1

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Mounir Hahad, Thierry Priol, Jocelyne Erhel. Irregular Loop Patterns Compilation on Distributed Shared Memory Multiprocessors. [Research Report] RR-2361, INRIA. 1994. ⟨inria-00074317⟩

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