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From high level programming model to FPGA machines

Jean-Pierre Banâtre 1 Dominique Lavenier 2 Marc Vieillot 2
1 IRISA - LA ou URA 227 - INRIA Rennes
2 API - Parallel VLSI Architectures
IRISA - Institut de Recherche en Informatique et Systèmes Aléatoires, INRIA Rennes
Résumé : Disponible dans les fichiers attachés à ce document
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Reports
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https://hal.inria.fr/inria-00074430
Contributor : Rapport de Recherche Inria Connect in order to contact the contributor
Submitted on : Wednesday, May 24, 2006 - 3:17:13 PM
Last modification on : Friday, February 4, 2022 - 3:24:01 AM
Long-term archiving on: : Monday, April 5, 2010 - 12:09:59 AM

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  • HAL Id : inria-00074430, version 1

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INRIA | INRIA-RRRT | IRISA | CNRS | UNIV-RENNES1 | LARA | UR1-MATH-STIC | UR1-UFR-ISTIC | UNIV-RENNES | INSA-GROUPE | INSA-RENNES | UR1-MATH-NUM | EC-PARIS | INRIA2

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Jean-Pierre Banâtre, Dominique Lavenier, Marc Vieillot. From high level programming model to FPGA machines. [Research Report] RR-2240, INRIA. 1994. ⟨inria-00074430⟩

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