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Machine modeling and loop optimization for horizontal microcoded machines

François Bodin 1 François Charot 1 
1 API - Parallel VLSI Architectures
IRISA - Institut de Recherche en Informatique et Systèmes Aléatoires, INRIA Rennes
Abstract : Long Instruction Word (LIW) architecture exploits parallelism between various functional units. In order to produce efficient code for such an architecture, the microcode compiler will have to expose a relatively large degree of fine grain parallelism and it will have to take into account the fine level characteristics of the architecture. The goal of this paper is to focus on two main aspects of the compilation process for LIW architectures : micromachine modeling and loop optimization. The machine model that has been defined is firstly described. Then a new loop optimization algorithm based on the loop unrolling technique is introduced and compared to the classical software pipeling algorithm. This algorithm differs from the traditional lopp unrolling algorithm because the unrolling of the loop is only used to find a cyclic scheduling of the loop, then this scheduling allows a software pipelining to be constructed.
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Reports (Research report)
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Submitted on : Wednesday, May 24, 2006 - 6:04:30 PM
Last modification on : Thursday, October 27, 2022 - 3:45:15 AM
Long-term archiving on: : Tuesday, April 12, 2011 - 6:41:43 PM


  • HAL Id : inria-00075365, version 1


François Bodin, François Charot. Machine modeling and loop optimization for horizontal microcoded machines. [Research Report] RR-1193, INRIA. 1990. ⟨inria-00075365⟩



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