Test Design From System Level Specification

Abstract : Some distributed systems require a high degree of reliability. On the one hand, industrials pay much for testing activity in order to detect possible faults during design and implementation of communication components. On the other hand, standards are now available and systems must be tested for conformance. This work results from the collaboration between different institutions. The paper is a contribution to testing methodology for software/hardware systems specified with the VHDL standard. The proposed methodology is based on the computation of behavioral part of VHDL model. Different test selection techniques can be applied to the behavioral part, and the target test system is also modelled in VHDL. Test experiment can be performed with VHDL simulation tools and this constitute a great interest of our approach.
Type de document :
Communication dans un congrès
International Conference on Parallel & Distributed Processing Techniques & Applications - PDPTA'98, 1998, Las Vegas, USA, 1, 1998
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https://hal.inria.fr/inria-00098452
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Soumis le : lundi 25 septembre 2006 - 17:01:37
Dernière modification le : jeudi 11 janvier 2018 - 06:25:24

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  • HAL Id : inria-00098452, version 1

Citation

Ousmane Koné, Richard Castanet. Test Design From System Level Specification. International Conference on Parallel & Distributed Processing Techniques & Applications - PDPTA'98, 1998, Las Vegas, USA, 1, 1998. 〈inria-00098452〉

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