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Verification and Validation techniques used by EAST partners

Abstract : In this document, we analyze the different techniques that can be applied in order to validate an electronic embedded system. These techniques are classified in Model Checking, Static Analysis, Simulation, Test, Timing Analysis. Furthermore, we identify the objects and their attributes that have to be described by the language EAST-ADL. || Dans ce document, nous analysons les différentes techniques qui peuvent être appliquées por valider des systèmes électroniques embarqués. Ces techniques sont classées en Model-Checking, analyse statique, simulation, test, analyse de performances. De plus,
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https://hal.inria.fr/inria-00099652
Contributor : Publications Loria <>
Submitted on : Tuesday, September 26, 2006 - 9:39:49 AM
Last modification on : Friday, February 26, 2021 - 3:28:08 PM

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  • HAL Id : inria-00099652, version 1

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Alice Halter, Gerardo Satriano, Françoise Simonot-Lion, Jens Hermann, Mikael Nolin. Verification and Validation techniques used by EAST partners. [Contract] A03-R-339 || halter03a, 2003, 61 p. ⟨inria-00099652⟩

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