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Conference papers

On-chip learning of FPGA-inspired neural nets

Bernard Girau 1
1 CORTEX - Neuromimetic intelligence
INRIA Lorraine, LORIA - Laboratoire Lorrain de Recherche en Informatique et ses Applications
Abstract : Neural networks are usually considered as naturally parallel computing models. But the number of operators and the complex connection graphs of standard neural models can not be handled by digital hardware devices. A new theoretical and practical framework allows to reconcile simple hardware topologies with complex neural architectures: Field Programmable Neural Arrays (FPNA) lead to powerful neural architectures that are easy to map onto digital hardware, thanks to a simplified topology and an original data exchange scheme. This paper focuses on a class of synchronous FPNAs, for which an efficient implementation with on-chip learning is described. Application and implementation results are rapidly discussed.
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Submitted on : Tuesday, September 26, 2006 - 2:45:59 PM
Last modification on : Friday, February 26, 2021 - 3:28:03 PM


  • HAL Id : inria-00100467, version 1



Bernard Girau. On-chip learning of FPGA-inspired neural nets. International Joint Conference on Neural Networks - IJCNN'01, Jul 2001, Washington, USA, 6 p. ⟨inria-00100467⟩



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