C. André, Representation and analysis of reactive behaviors: A synchronous approach, Computational Engineering in Systems Applications, pp.19-29, 1996.

F. Baccelli, G. Cohen, G. J. Olsder, and J. Quadrat, Synchronization and Linearity: an algebra for discrete event systems, 1992.

A. Benveniste, P. Caspi, S. Edwards, N. Hallbwachs, P. L. Guernic et al., The synchronous languages 12 years later, IEEE Proceedings, pp.64-83, 2003.
DOI : 10.1109/JPROC.2002.805826

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.71.6645

J. Boucaron, J. Millo, and R. Simone, Another Glance at Relay Stations in Latency-Insensitive Design, Electronic Notes in Theoretical Computer Science, vol.146, issue.2, pp.41-59, 2006.
DOI : 10.1016/j.entcs.2005.05.035

URL : http://doi.org/10.1016/j.entcs.2005.05.035

R. François, . Boyer, Y. Aboulhamid, M. Savaria, and . Boyer, Optimal design of synchronous circuits using software pipelining techniques, ICCD'98, pp.62-67, 1998.

J. Carlier and P. Chrétienne, Probì eme d'ordonnancement: modélisation, complexité , algorithmes, 1988.

L. Carloni, K. Mcmillan, and A. Sangiovanni-vincentelli, Theory of latency-insensitive design, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.20, issue.9, pp.1059-1076, 2001.
DOI : 10.1109/43.945302

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.16.1198

P. Luca, K. L. Carloni, A. Mcmillan, A. L. Saldanha, and . Sangiovanni-vincentelli, A methodology for correct-by-construction latency insensitive design, ICCAD '99: Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design, pp.309-315, 1999.

P. Luca, A. L. Carloni, and . Sangiovanni-vincentelli, Performance analysis and optimization of latency-insensitive systems, The Proceedings of the Design Automation Conference, pp.361-367, 2000.

R. Mario, L. Casu, and . Macchiarulo, A detailed implementation of latency insensitive protocols, Proceedings of Formal Methods for Globally Asyncronous Locally Syncronous Architectures, pp.94-103, 2003.

R. Mario, L. Casu, and . Macchiarulo, Floorplanning for throughput, ISPD '04: Proceedings of the 2004 international symposium on Physical design, pp.62-69, 2004.

R. Mario, L. Casu, and . Macchiarulo, A new approach to latency insensitive design, DAC '04: Proceedings of the 41st annual conference on Design automation, pp.576-581, 2004.

A. Chakraborty and M. R. Greenstreet, A minimalist source-synchronous interface, Proceedings of the 15th IEEE ASIC/SOC Conference, pp.443-447, 2002.
DOI : 10.1109/asic.2002.1158100

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.14.4271

T. Chelcea and S. M. Nowick, Robust interfaces for mixed-timing systems with application to latency-insensitive protocols, Proceedings of the 38th conference on Design automation , DAC '01, pp.21-26, 2001.
DOI : 10.1145/378239.378256

A. Cohen, M. Duranton, C. Eisenbeis, C. Pagetti, F. Plateau et al., N-synchronous kahn networks: a relaxed model of synchrony for real-time systems, POPL '06: Conference record of the 33rd ACM SIGPLAN-SIGACT symposium on Principles of programming languages, pp.180-193, 2006.

F. Commoner, A. W. Holt, S. Even, and A. Pnueli, Marked directed graphs, Journal of Computer and System Sciences, vol.5, issue.5, pp.511-523, 1971.
DOI : 10.1016/S0022-0000(71)80013-2

A. Dasdan, Experimental analysis of the fastest optimum cycle ratio and mean algorithms, ACM Transactions on Design Automation of Electronic Systems, vol.9, issue.4, pp.385-418, 2004.
DOI : 10.1145/1027084.1027085

V. Van-dongen, G. R. Gao, and Q. Ning, A polynomial time method for optimal software pipelining, CONPAR '92/ VAPP V: Proceedings of the Second Joint International Conference on Vector and Parallel Processing, pp.613-624, 1992.
DOI : 10.1007/3-540-55895-0_462

C. Ramchandani, Analysis of Asynchronous Concurrent Systems by Timed Petri Nets, 1973.

A. V. Yakovlev, A. M. Koelmans, and L. Lavagno, High-level modeling and design of asynchronous interface logic, IEEE Design & Test of Computers, vol.12, issue.1, pp.32-40, 1995.
DOI : 10.1109/54.350688

. Unité-de-recherche-inria-sophia and . Antipolis, route des Lucioles -BP 93 -06902 Sophia Antipolis Cedex (France) Unité de recherche INRIA Futurs : Parc Club Orsay Université -ZAC des Vignes 4, 2004.

I. Unité-de-recherche and . Lorraine, Technopôle de Nancy-Brabois -Campus scientifique 615, rue du Jardin Botanique -BP 101 -54602 Villers-lès-Nancy Cedex (France) Unité de recherche INRIA Rennes : IRISA, Campus universitaire de Beaulieu -35042 Rennes Cedex (France) Unité de recherche INRIA Rhône-Alpes : 655, avenue de l'Europe -38334 Montbonnot Saint-Ismier (France) Unité de recherche INRIA Rocquencourt, Domaine de Voluceau -Rocquencourt -BP 105 -78153 Le Chesnay Cedex