UML/MARTE CCSL, Signal and Petri nets

Frédéric Mallet 1 Charles André 1
1 AOSTE - Models and methods of analysis and optimization for systems with real-time and embedding constraints
CRISAM - Inria Sophia Antipolis - Méditerranée , Inria Paris-Rocquencourt, COMRED - COMmunications, Réseaux, systèmes Embarqués et Distribués
Abstract : UML goal of being a general-purpose modeling language discards the possibility to adopt too precise and strict a semantics. Users are to refine or define the semantics in their domain specific profiles. In the UML Profile for Modeling and Analysis of Real-Time and Embedded systems, we have defined a broadly expressive Time Model to provide a generic timed interpretation for UML models. Our clock constraint specification language supports the specification of systems with multiple clock domains. Starting with a priori independent clocks, we progressively compose them to get a family of possible executions. Our language supports both synchronous and asynchronous compositions, just like the synchronous language Signal, but also allows explicit non determinism. In this paper, we give a formal semantics to a core subset of MARTE clock constraint languages and we give an equivalent interpretation of this kernel in two other very different formal languages, Signal and Time Petri Nets.
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[Research Report] RR-6545, INRIA. 2008
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https://hal.inria.fr/inria-00283077
Contributeur : Frédéric Mallet <>
Soumis le : jeudi 12 juin 2008 - 13:18:31
Dernière modification le : mardi 13 décembre 2016 - 15:40:51
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Frédéric Mallet, Charles André. UML/MARTE CCSL, Signal and Petri nets. [Research Report] RR-6545, INRIA. 2008. <inria-00283077v4>

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