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On-Line Arithmetic Based Reprogrammable Hardware Implementation of LVQ Neural Network for Alertness Classification

M. Boubaker 1 Khaled Ben Khalifa 1 Bernard Girau 2 Mohamed Dogui 3 Mohamed Hédi Bedoui 1
1 TIM - Laboratoire Technologie et Imagerie Médicale [Monastir]
2 CORTEX - Neuromimetic intelligence
INRIA Lorraine, LORIA - Laboratoire Lorrain de Recherche en Informatique et ses Applications
3 Service d'Exploration Fonctionnelle du Système Nerveux
Abstract : The current study presents the hardware implementation of a learning Vector Quantization (LVQ) neural network. Starting from the spectral EEG analysis, we suggest an LVQ serial on-line architecture implementation on a Field programmable Gate Array (FPGA) circuit. Our concern was mainly to get a light, easy-to-wear system for the classification of vigilance levels in humans using EEG signals. The results of these classified states by LVQ mode are presented in this paper. Furthermore, the highly satisfactory performances of our implementation in terms of area speed and delay are described.
Keywords : LVQ neural network on-line arithmetics FPGA EEG and vigilance
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Journal articles
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https://hal.inria.fr/inria-00338767
Contributor : Bernard Girau Connect in order to contact the contributor
Submitted on : Friday, November 14, 2008 - 11:53:41 AM
Last modification on : Friday, February 4, 2022 - 3:30:40 AM

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  • HAL Id : inria-00338767, version 1

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CNRS | INRIA | LORIA | UNIV-LORRAINE | INRIA2

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M. Boubaker, Khaled Ben Khalifa, Bernard Girau, Mohamed Dogui, Mohamed Hédi Bedoui. On-Line Arithmetic Based Reprogrammable Hardware Implementation of LVQ Neural Network for Alertness Classification. International Journal of Computer Science and Network Security, Jitra, 2008, 8 (3), pp.260-266. ⟨inria-00338767⟩

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