45nm High-k + metal gate strain-enhanced transistors, 2008 Symposium on VLSI Technology, 2008. ,
DOI : 10.1109/VLSIT.2008.4588589
Circuits, interconnections, and packaging for VLSI, 1990. ,
Performance implications of single thread migration on a chip multi-core, ACM SIGARCH Computer Architecture News, vol.33, issue.4, pp.80-91, 2005. ,
DOI : 10.1145/1105734.1105745
Design of ion-implanted MOSFET's with very small physical dimensions, IEEE Journal of Solid-State Circuits, vol.9, issue.5, pp.256-268, 1974. ,
DOI : 10.1109/JSSC.1974.1050511
Reducing power density through activity migration, Proceedings of the 2003 international symposium on Low power electronics and design , ISLPED '03, 2003. ,
DOI : 10.1145/871506.871561
Amdahl's Law in the Multicore Era, Computer, vol.41, issue.7, pp.33-38, 2008. ,
DOI : 10.1109/MC.2008.209
Circuit and microarchitectural techniques for reducing cache leakage power, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, pp.167-184, 2004. ,
Heterogeneous chip multiprocessors, Computer, vol.38, issue.11, pp.32-38, 2005. ,
DOI : 10.1109/MC.2005.379
An analytical model of temperature in microprocessors, 2005. ,
URL : https://hal.archives-ouvertes.fr/inria-00000613
A study of thread migration in temperature-constrained multicores, ACM Transactions on Architecture and Code Optimization, vol.4, issue.2, 2007. ,
DOI : 10.1145/1250727.1250729
Performance, Power Efficiency and Scalability of Asymmetric Cluster Chip Multiprocessors, IEEE Computer Architecture Letters, vol.5, issue.1, 2006. ,
DOI : 10.1109/L-CA.2006.6
Heat-and-run: leveraging SMT and CMP to manage power density through the operating system, Proceedings of the 11th International Conference on Architectural Support for Programming Languages and Operating Systems, 2004. ,
On the modeling of the transient thermal behavior of semiconductor devices, IEEE Transactions on Electron Devices, vol.48, issue.12, pp.2796-2802, 2001. ,
DOI : 10.1109/16.974706
Temperature-aware microarchitecture, Proceedings of the 30th Annual International Symposium on Computer Architecture, 2003. ,
The end of CMOS scaling, IEEE Circuits and Devices Magazine, vol.21, issue.1, pp.16-26, 2005. ,
DOI : 10.1109/MCD.2005.1388765
An asymmetric multi-core architecture for accelerating critical sections, 2008. ,
In Search of ???Forever,??? Continued Transistor Scaling One New Material at a Time, IEEE Transactions on Semiconductor Manufacturing, vol.18, issue.1, pp.26-36, 2005. ,
DOI : 10.1109/TSM.2004.841816
Dynamic sleep transistor and body bias for active leakage power control of microprocessors, IEEE Journal of Solid-State Circuits, vol.38, issue.11, pp.1838-1845, 2003. ,
DOI : 10.1109/JSSC.2003.818291