A Hardware Processing Unit for Point Sets

Abstract : We present a hardware architecture and processing unit for point sampled data. Our design is focused on fundamental and computationally expensive operations on point sets including k-nearest neighbors search, moving least squares approximation, and others. Our architecture includes a configurable processing module allowing users to implement custom operators and to run them directly on the chip. A key component of our design is the spatial search unit based on a kd-tree performing both kNN and eN searches. It utilizes stack recursions and features a novel advanced caching mechanism allowing direct reuse of previously computed neighborhoods for spatially coherent queries. In our FPGA prototype, both modules are multi-threaded, exploit full hardware parallelism, and utilize a fixed-function data path and control logic for maximum throughput and minimum chip surface. A detailed analysis demonstrates the performance and versatility of our design.
Type de document :
Communication dans un congrès
David Luebke and John Owens. Graphics Hardware 2008, Jun 2008, Sarajevo, Bosnia and Herzegovina. Eurographics Association, pp.21-31, 2008
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https://hal.inria.fr/inria-00354990
Contributeur : Gaël Guennebaud <>
Soumis le : mercredi 21 janvier 2009 - 16:20:53
Dernière modification le : mercredi 4 octobre 2017 - 11:24:02

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  • HAL Id : inria-00354990, version 1

Citation

Simon Heinzle, Gael Guennebaud, Mario Botsch, Markus Gross. A Hardware Processing Unit for Point Sets. David Luebke and John Owens. Graphics Hardware 2008, Jun 2008, Sarajevo, Bosnia and Herzegovina. Eurographics Association, pp.21-31, 2008. 〈inria-00354990〉

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