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Transaction Activation scheduling Support for Transactional Memory

Abstract : Transactional Memory (TM) is considered as one of the most promising paradigms for developing concurrent applications. TM has been shown to scale well on multiple cores when the data access pattern behaves “well,” i.e., when few conflicts are induced. In contrast, data patterns with frequent write sharing, with long transactions, or when many threads contend for a smaller number of cores, produce numerous aborts. These problems are traditionally addressed by application-level contention managers, but they suffer from a lack of precision and provide unpredictable benefits on many workloads. In this paper, we propose a system approach where the scheduler tries to avoid aborts by preventing conflicting transactions from running simultaneously. We use a combination of several techniques to help reduce the odds of conflicts, by (1) avoiding preempting threads running a transaction until the transaction completes, (2) keeping track of conflicts and delaying the restart of a transaction until conflicting transactions have committed, and (3) keeping track of conflicts and only allowing a thread with conflicts to run at low priority. Our approach has been implemented in Linux for Software Transactional Memory (STM) using a shared memory segment to allow fast communication between the STM library and the scheduler. It only requires small and contained modifications to the operating system. Experimental evaluation demonstrates that our approach significantly reduces the number of aborts while improving transaction throughput on various workloads.
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https://hal.inria.fr/inria-00363376
Contributor : Gilles Muller <>
Submitted on : Monday, February 23, 2009 - 10:38:13 AM
Last modification on : Friday, January 8, 2021 - 5:46:03 PM
Long-term archiving on: : Thursday, June 30, 2011 - 10:59:24 AM

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  • HAL Id : inria-00363376, version 1

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Walther Maldonado, Patrick Marlier, Pascal Felber, Julia Lawall, Gilles Muller. Transaction Activation scheduling Support for Transactional Memory. [Research Report] RR-6807, INRIA. 2009, 28 p. ⟨inria-00363376⟩

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