Steal-on-Abort: Improving Transactional Memory Performance through Dynamic Transaction Reordering

Abstract : In transactional memory, aborted transactions reduce performance, and waste computing resources. Ideally, concurrent execution of transactions should be optimally ordered to minimise aborts, but such an ordering is often either complex, or unfeasible, to obtain. This paper introduces a new technique called steal-on-abort, which aims to improve transaction ordering at runtime. Suppose transactions A and B conflict, and B is aborted. In general it is difficult to predict this first conflict, but once observed, it is logical not to execute the two transactions concurrently again. In steal-on-abort, the aborted transaction B is stolen by its opponent transaction A, and queued behind A to prevent concurrent execution of A and B. Without steal-on-abort, transaction B would typically have been restarted immediately, and possibly had a repeat conflict with transaction A. Steal-on-abort requires no application-specific information, modification, or offline pre-processing. In this paper, it is evaluated using a sorted linked list, red-black tree, STAMP-vacation, and Lee-TM. The evaluation reveals steal-on-abort is highly effective at eliminating repeat conflicts, which reduces the amount of computing resources wasted, and significantly improves performance.
Type de document :
Communication dans un congrès
André Seznec and Joel Emer and Mike O'Boyle and Margaret Martonosi and Theo Ungerer. HiPEAC 2009 - High Performance and Embedded Architectures and Compilers, Jan 2009, Paphos, Cyprus. Springer, 5409, 2009, Lecture Notes in Computer Science. 〈10.1007/978-3-540-92990-1_3〉
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https://hal.inria.fr/inria-00439445
Contributeur : Ist Rennes <>
Soumis le : lundi 7 décembre 2009 - 15:29:03
Dernière modification le : mercredi 10 janvier 2018 - 18:08:07

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Mohammad Ansari, Mikel Lujan, Christos Kotselidis, Kim Jarvis, Chris Kirkham, et al.. Steal-on-Abort: Improving Transactional Memory Performance through Dynamic Transaction Reordering. André Seznec and Joel Emer and Mike O'Boyle and Margaret Martonosi and Theo Ungerer. HiPEAC 2009 - High Performance and Embedded Architectures and Compilers, Jan 2009, Paphos, Cyprus. Springer, 5409, 2009, Lecture Notes in Computer Science. 〈10.1007/978-3-540-92990-1_3〉. 〈inria-00439445〉

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