High Speed CPU Simulation Using LTU Dynamic Binary Translation

Abstract : In order to increase the speed of dynamic binary translation based simulators we consider the translation of large translation units consisting of multiple blocks. In contrast to other simulators, which translate hot blocks or pages, the techniques presented in this paper profile the target program's execution path at runtime. The identification of hot paths ensures that only executed code is translated whilst at the same time offering greater scope for optimization. Mean performance figures for the functional simulation of EEMBC benchmarks show the new simulation techniques to be at least 63% faster than basic block based dynamic binary translation.
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Communication dans un congrès
André Seznec and Joel Emer and Mike O'Boyle and Margaret Martonosi and Theo Ungerer. HiPEAC 2009 - High Performance and Embedded Architectures and Compilers, Jan 2009, Paphos, Cyprus. Springer, 2009, 〈10.1007/978-3-540-92990-1_6〉
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https://hal.inria.fr/inria-00445467
Contributeur : Ist Rennes <>
Soumis le : vendredi 8 janvier 2010 - 15:41:57
Dernière modification le : jeudi 26 octobre 2017 - 16:34:01

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Daniel Jones, Nigel Topham. High Speed CPU Simulation Using LTU Dynamic Binary Translation. André Seznec and Joel Emer and Mike O'Boyle and Margaret Martonosi and Theo Ungerer. HiPEAC 2009 - High Performance and Embedded Architectures and Compilers, Jan 2009, Paphos, Cyprus. Springer, 2009, 〈10.1007/978-3-540-92990-1_6〉. 〈inria-00445467〉

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