Optimization of Routing and Reconfiguration Overhead in Programmable Processor Array Architectures

Abstract : In this paper, we present a constraint programming-based approach for optimization of routing and reconfiguration overhead for a class of reconfigurable processor array architectures called weakly programmable. For a given set of different algorithms the execution of which is supposed to be switched upon request at run-time, we provide static solutions for optimal routing of data between processor elements as well as for minimization of the routing area and the reconfiguration overhead when switching between the execution of these algorithms. Our experiments confirm that our method can minimize routing overhead and reduce reconfiguration time significantly.
Type de document :
Communication dans un congrès
16th International Symposium on Field-Programmable Custom Computing Machines (FCCM 2008), Apr 2008, Palo Alto, United States. pp.306-309, 2008, 〈10.1109/FCCM.2008.16〉
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https://hal.inria.fr/inria-00451676
Contributeur : François Charot <>
Soumis le : vendredi 29 janvier 2010 - 16:21:11
Dernière modification le : mercredi 16 mai 2018 - 11:23:26

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Christophe Wolinski, Krzysztof Kuchcinski, Jürgen Teich, Frank Hannig. Optimization of Routing and Reconfiguration Overhead in Programmable Processor Array Architectures. 16th International Symposium on Field-Programmable Custom Computing Machines (FCCM 2008), Apr 2008, Palo Alto, United States. pp.306-309, 2008, 〈10.1109/FCCM.2008.16〉. 〈inria-00451676〉

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