Communication Network Reconfiguration Overhead Optimization in Programmable Processor Array Architectures

Abstract : In this paper, we introduce a constraint programming-based approach for optimization of routing and reconfiguration overhead for a class of reconfigurable processor array architectures called weakly programmable. For a given set of different algorithms the execution of which is supposed to be switched upon request at run-time, we provide static solutions for optimal routing of data between processors as well as for minimization of the routing area and the reconfiguration overhead when switching between the execution of these algorithms. In fact, applying the switching can be accomplished in just a few clock cycles. Our experiments confirm that our method can minimize routing overhead and reduce reconfiguration time significantly.
Type de document :
Communication dans un congrès
Conference on Digital System Design Architectures, Methods and Tools (DSD 2008), Sep 2008, Parme, Italy. pp.345-352, 2008, 〈10.1109/DSD.2008.1〉
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https://hal.inria.fr/inria-00451679
Contributeur : François Charot <>
Soumis le : vendredi 29 janvier 2010 - 16:27:02
Dernière modification le : mercredi 16 mai 2018 - 11:23:26

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Christophe Wolinski, Krzysztof Kuchcinski, Jürgen Teich, Frank Hannig. Communication Network Reconfiguration Overhead Optimization in Programmable Processor Array Architectures. Conference on Digital System Design Architectures, Methods and Tools (DSD 2008), Sep 2008, Parme, Italy. pp.345-352, 2008, 〈10.1109/DSD.2008.1〉. 〈inria-00451679〉

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