Communication Network Reconfiguration Overhead Optimization in Programmable Processor Array Architectures

Christophe Wolinski 1 Krzysztof Kuchcinski 2 Jürgen Teich 3 Frank Hannig 3
1 CAIRN - Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources
Inria Rennes – Bretagne Atlantique , IRISA-D3 - ARCHITECTURE
2 Department of Computer Science [Lund]
3 CS 12 - Department of Computer Science 12, Hardware-Software-Co-Design
Abstract : In this paper, we introduce a constraint programming-based approach for optimization of routing and reconfiguration overhead for a class of reconfigurable processor array architectures called weakly programmable. For a given set of different algorithms the execution of which is supposed to be switched upon request at run-time, we provide static solutions for optimal routing of data between processors as well as for minimization of the routing area and the reconfiguration overhead when switching between the execution of these algorithms. In fact, applying the switching can be accomplished in just a few clock cycles. Our experiments confirm that our method can minimize routing overhead and reduce reconfiguration time significantly.
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Conference papers
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https://hal.inria.fr/inria-00451679
Contributor : François Charot <>
Submitted on : Friday, January 29, 2010 - 4:27:02 PM
Last modification on : Friday, November 16, 2018 - 1:39:40 AM

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Christophe Wolinski, Krzysztof Kuchcinski, Jürgen Teich, Frank Hannig. Communication Network Reconfiguration Overhead Optimization in Programmable Processor Array Architectures. Conference on Digital System Design Architectures, Methods and Tools (DSD 2008), Sep 2008, Parme, Italy. pp.345-352, ⟨10.1109/DSD.2008.1⟩. ⟨inria-00451679⟩

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