D. [. Alur and . Dill, A theory of timed automata, Theoretical Computer Science, vol.126, issue.2, pp.183-235, 1994.
DOI : 10.1016/0304-3975(94)90010-8

L. [. Alur, T. Fix, and . Henzinger, Event-clock automata: a determinizable class of timed automata, Theoretical Computer Science, vol.211, issue.1-2, pp.253-273, 1999.
DOI : 10.1016/S0304-3975(97)00173-4

]. R. Alu99 and . Alur, Timed automata, Proc. 11th International Computer Aided Verification Conference, pp.8-22, 1999.

]. D. Ang87 and . Angluin, Learning regular sets from queries and counterexamples, Information and Computation, vol.75, pp.87-106, 1987.

J. L. Balcázar, J. Díaz, and R. Gavaldá, Algorithms for Learning Finite Automata from Queries: A Unified View, Advances in Algorithms, Languages, and Complexity, pp.53-72, 1997.
DOI : 10.1007/978-1-4613-3394-4_2

M. Bozga, C. Daws, O. Maler, A. Olivero, S. Tripakis et al., Kronos: A model-checking tool for real-time systems, Proc. 10th International Conference on Computer Aided Verification, pp.546-550, 1998.
DOI : 10.1007/BFb0028779

URL : https://hal.archives-ouvertes.fr/hal-00374788

]. T. Bgj-+-05, O. Berg, B. Grinchtein, M. Jonsson, H. Leucker et al., On the correspondence between conformance testing and regular inference, Proc. FASE '05, 8 th Int. Conf. on Fundamental Approaches to Software Engineering, pp.175-189, 2005.

T. Berg, B. Jonsson, and H. Raffelt, Regular Inference for State Machines Using Domains with Equality Tests, Proc. FASE '08, 11 th Int. Conf. on Fundamental Approaches to Software Engineering, pp.317-331, 2008.
DOI : 10.1007/978-3-540-78743-3_24

]. J. Bll-+-96, K. G. Bengtsson, F. Larsen, P. Larsson, W. Pettersson et al., UPPAAL: a tool suite for the automatic verification of real-time systems, Hybrid Systems III, pp.232-243, 1996.

J. Bengtsson and W. Yi, On Clock Difference Constraints and Termination in Reachability Analysis of Timed Automata, Proc. ICFEM 2003, 5th Int. Conf. on Formal Engineering Methods, pp.491-503, 2003.
DOI : 10.1007/978-3-540-39893-6_28

. C. Cdh-+-00-]-j, M. B. Corbett, J. Dwyer, S. Hatcliff, C. S. Laubach et al., Bandera : Extracting finite-state models from java source code, Proc. 22nd Int. Conf. on Software Engineering, 2000.

]. D. Dil89 and . Dill, Timing assumptions and verification of finite-state concurrent systems, Automatic Verification Methods for Finite State Systems, pp.197-212, 1989.

S. [. Daws and . Tripakis, Model checking of real-time reachability properties using abstractions, TACAS, pp.313-329, 1998.
DOI : 10.1007/BFb0054180

[. Fernandez, C. Jard, T. Jéron, and C. Viho, An experiment in automatic generation of test suites for protocols with verification technology, Science of Computer Programming, vol.29, issue.1-2, 1997.
DOI : 10.1016/S0167-6423(96)00032-9

URL : https://hal.archives-ouvertes.fr/inria-00073775

B. [. Grinchtein, P. Jonsson, and . Pettersson, Inference of eventrecording automata using timed decision trees, Proc. CONCUR 2006, 17 th Int. Conf. on Concurrency Theory, pp.435-449, 2006.

]. E. Gol67 and . Gold, Language identification in the limit, Information and Control, vol.10, pp.447-474, 1967.

D. [. Groce, M. Peled, and . Yannakakis, Adaptive Model Checking, Proc. TACAS '02, 8 th Int. Conf. on Tools and Algorithms for the Construction and Analysis of Systems, pp.357-370, 2002.
DOI : 10.1007/3-540-46002-0_25

]. O. Gri08 and . Grinchtein, Learning of Timed Systems, 2008.

H. [. Hagerer, O. Hungar, B. Niese, and . Steffen, Model Generation by Moderated Regular Extrapolation, Proc. FASE '02, 5 th Int. Conf. on Fundamental Approaches to Software Engineering, volume 2306 of Lecture Notes in Computer Science, pp.80-95, 2002.
DOI : 10.1007/3-540-45923-5_6

]. D. Hln-+-90, H. Harel, A. Lachover, A. Naamad, M. Pnueli et al., STATEMATE: A working environment for the development of complex reactive systems, IEEE Trans. on Software Engineering, vol.16, issue.4, pp.403-414, 1990.

Z. [. Henzinger, A. Manna, and . Pnueli, Temporal Proof Methodologies for Timed Transition-Systems, Information and Computation, vol.112, issue.2, pp.173-337, 1994.
DOI : 10.1006/inco.1994.1060

H. Hungar, O. Niese, and B. Steffen, Domain-Specific Optimization in Automata Learning, Proc. 15 th Int. Conf. on Computer Aided Verification, 2003.
DOI : 10.1007/978-3-540-45069-6_31

]. G. Hol00 and . Holzmann, Logic verification of ANSI-C code with SPIN, SPIN Model Checking and Software Verification: Proc. 7 th Int. SPIN Workshop, pp.131-147, 2000.

J. [. Henzinger, P. Raskin, and . Schobbens, The regular real-time languages, Proc. ICALP '98, 25 th International Colloquium on Automata, Lnaguages, and Programming, pp.580-591, 1998.
DOI : 10.1007/BFb0055086

U. [. Kearns and . Vazirani, An Introduction to Computational Learning Theory, 1994.

A. [. Maler and . Pnueli, On Recognizable Timed Languages, Proc. FOSSACS04, Conf. on Foundations of Software Science and Computation Structures, 2004.
DOI : 10.1007/978-3-540-24727-2_25

R. [. Rivest, M. Schapire, J. Ebner, and . Grabowski, Inference of finite automata using homing sequences Information and Computation Test generation with autolink and testcomposer, Proc. 2nd Workshop of the SDL Forum Society on SDL and MSC -SAM'2000, pp.299-347, 1993.

F. [. Springintveld and . Vaandrager, Minimizable timed automata, Proc. FTRTFT'96, Formal Techniques in Real-Time and Fault-Tolerant Systems, pp.130-147
DOI : 10.1007/3-540-61648-9_38

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.55.3232

]. S. Vdww06, M. M. Verwer, C. De-weerdt, and . Witteveen, Identifying an automaton model for timed data, Proceedings of the Annual Machine Learning Conference of Belgium and the Netherlands (Benelearn), pp.57-64, 2006.

]. T. Wil94 and . Wilke, Specifying timed state sequences in powerful decidable logics and timed automata, Proc. FTRTFT'94, Formal Techniques in Real-Time and Fault- Tolerant Systems, pp.694-715, 1994.

]. S. Yov96 and . Yovine, Model checking timed automata, European Educational Forum: School on Embedded Systems, pp.114-152, 1996.