Test Synthesis from UML Models of Distributed Software

Simon Pickin 1 Claude Jard 2 Thierry Jéron 3 Jean-Marc Jézéquel 4 Yves Le Traon 4
2 DISTRIBCOM - Distributed and Iterative Algorithms for the Management of Telecommunications Systems
IRISA - Institut de Recherche en Informatique et Systèmes Aléatoires, Inria Rennes – Bretagne Atlantique
4 TRISKELL - Reliable and efficient component based software engineering
IRISA - Institut de Recherche en Informatique et Systèmes Aléatoires, Inria Rennes – Bretagne Atlantique
Abstract : The object-oriented software development process is increasingly used for the construction of complex distributed systems. In this context, behavior models have long been recognized as the basis for systematic approaches to requirements capture, specification, design, simulation, code generation, testing, and verification. Two complementary approaches for modeling behavior have proven useful in practice: interaction-based modeling (e.g. UML sequence diagrams) and state-based modeling (e.g. UML statecharts). Building on formal V\& V techniques, in this article we present a method and a tool for automated synthesis of test cases from scenarios and a state-based design model of the application, remaining entirely within the UML framework. The underlying ``on the fly'' test synthesis algorithms are based on the input/output labeled transition system formalism, which is particularly appropriate for modeling applications involving asynchronous communication. The method is eminently compatible with classical OO development processes since it can be used to synthesize test cases from the scenarios used in early development stages to model global interactions between actors and components, instead of these test cases being derived manually. We illustrate the system test synthesis process using an Air Traffic Control software example.
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Simon Pickin, Claude Jard, Thierry Jéron, Jean-Marc Jézéquel, Yves Le Traon. Test Synthesis from UML Models of Distributed Software. IEEE Transactions on Software Engineering, Institute of Electrical and Electronics Engineers, 2007, 33 (4), pp.252--268. ⟨inria-00477560⟩

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