Combined Scheduling and Instruction Selection for Processors with Reconfigurable Cell Fabric

Abstract : The paper presents a new method, based on constraint programming, for modeling and solving scheduling and instruction selection for processors extended with functionally reconfigurable cell fabric. Our method models parallel reconfigurable architecture, selection of application specific computational patterns and application scheduling. It takes also into account architectural constraints. The method provides efficient design space exploration that selects existing processor instructions and new instructions implementing computational patterns on a reconfigurable cell fabric. All instructions are scheduled enabling parallel instruction execution. Our method can be used directly for VLIW architectures by relaxing constraints concerning cell-processor data transfers. MediaBench and MiBench benchmarks has been used for evaluation and we obtained optimal results in many cases.
Type de document :
Communication dans un congrès
21th IEEE International Conference on Application-specific Systems, Architectures and Processors, (ASAP 2010), Jul 2010, Rennes, France. 2010
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https://hal.inria.fr/inria-00480680
Contributeur : François Charot <>
Soumis le : mardi 4 mai 2010 - 17:05:59
Dernière modification le : mercredi 16 mai 2018 - 11:23:26

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  • HAL Id : inria-00480680, version 1

Citation

Antoine Floch, Christophe Wolinski, Krzysztof Kuchcinski. Combined Scheduling and Instruction Selection for Processors with Reconfigurable Cell Fabric. 21th IEEE International Conference on Application-specific Systems, Architectures and Processors, (ASAP 2010), Jul 2010, Rennes, France. 2010. 〈inria-00480680〉

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