Abstract : This paper introduces a new variant implementation of Latency-Insensitive Design elements. It optimizes area footprint of so-called Shell-Wrappers being partially fused with their input Relay-Stations. The modified Relay-Station is called a Retry Relay-Station. We show correctness of this implementation and provide comparative results between a regular implementation and our new one on both FPGA and ASIC.
Julien Boucaron, Anthony Coadou, Robert De Simone. Latency-Insensitive Design: Retry Relay-Station and Fusion Shell. Electronic Notes in Theoretical Computer Science, Elsevier, 2009, 245, <10.1016/j.entcs.2009.07.026>. <inria-00483253>