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Latency-Insensitive Design: Retry Relay-Station and Fusion Shell

Julien Boucaron 1 Anthony Coadou 1, * Robert de Simone 1
* Corresponding author
1 AOSTE - Models and methods of analysis and optimization for systems with real-time and embedding constraints
CRISAM - Inria Sophia Antipolis - Méditerranée , Inria Paris-Rocquencourt, Laboratoire I3S - COMRED - COMmunications, Réseaux, systèmes Embarqués et Distribués
Abstract : This paper introduces a new variant implementation of Latency-Insensitive Design elements. It optimizes area footprint of so-called Shell-Wrappers being partially fused with their input Relay-Stations. The modified Relay-Station is called a Retry Relay-Station. We show correctness of this implementation and provide comparative results between a regular implementation and our new one on both FPGA and ASIC.
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https://hal.inria.fr/inria-00483253
Contributor : Anthony Coadou Connect in order to contact the contributor
Submitted on : Thursday, May 13, 2010 - 6:51:11 AM
Last modification on : Monday, January 4, 2021 - 7:08:03 PM

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Julien Boucaron, Anthony Coadou, Robert de Simone. Latency-Insensitive Design: Retry Relay-Station and Fusion Shell. Electronic Notes in Theoretical Computer Science, Elsevier, 2009, 245, ⟨10.1016/j.entcs.2009.07.026⟩. ⟨inria-00483253⟩

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