SCMP Architecture: An Asymmetric Multiprocessor System-on-Chip for Dynamic Applications

Abstract : Future systems will have to support multiple and concurrent dynamic compute-intensive applications, while respecting real-time and energy consumption constraints. Within this framework, this paper presents an architecture, named SCMP. This asymmetric multiprocessor can support dynamic migration and preemption of tasks, thanks to a concurrent control of tasks, while offering a specific data sharing solution. Its tasks are controlled by a dedicated HW-RTOS that allows online scheduling of independent real-time and nonreal-time tasks. By incorporating a connected component labeling algorithm into this platform, we have been able to measure its benefits for real-time and dynamic image processing.
Type de document :
Communication dans un congrès
IFMT'10 - Second International Forum on Next Generation Multicore/Manycore Technologies, Jun 2010, Saint Malo, France. 2010
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https://hal.inria.fr/inria-00492864
Contributeur : Ist Rennes <>
Soumis le : jeudi 17 juin 2010 - 12:35:48
Dernière modification le : lundi 20 juin 2016 - 14:10:32

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  • HAL Id : inria-00492864, version 1

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Nicolas Ventroux, Raphael David. SCMP Architecture: An Asymmetric Multiprocessor System-on-Chip for Dynamic Applications. IFMT'10 - Second International Forum on Next Generation Multicore/Manycore Technologies, Jun 2010, Saint Malo, France. 2010. 〈inria-00492864〉

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