Shared memory consistency models: a tutorial, Computer, vol.29, issue.12, pp.66-76, 1996. ,
DOI : 10.1109/2.546611
In-network coherence filtering, Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture, Micro-42, 2009. ,
DOI : 10.1145/1669112.1669143
RegionScout, Proceedings of International Symposium on Computer Architecture, 2005. ,
DOI : 10.1145/1080695.1069990
Improving Multiprocessor Performance with Coarse-Grain Coherence Tracking, 32nd International Symposium on Computer Architecture (ISCA'05), 2005. ,
DOI : 10.1109/ISCA.2005.31
Design and implementation of the blue gene/P snoop filter, 2008 IEEE 14th International Symposium on High Performance Computer Architecture, 2007. ,
DOI : 10.1109/HPCA.2008.4658623
Exploiting Access Semantics and Program Behavior to Reduce Snoop Power in Chip Multiprocessors, Proceeding of the International Conference on Architectural Support for Programming Languages and Operating Systems, 2008. ,
Interconnections in Multi-Core Architectures, ISCA, 2005. ,
DOI : 10.1145/1080695.1070004
The SPLASH?2 Programs: Characterization and Methodological Considerations, International Symposium on Computer Architecture, pp.24-36, 1995. ,
Optimizing NUCA Organizations and Wiring Alternatives for Large Caches with CACTI 6.0, 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO 2007), 2007. ,
DOI : 10.1109/MICRO.2007.33
Interconnect-Aware Coherence Protocols for Chip Multiprocessors, Proceeding 33rd International Symposium on Computer Architecture, pp.339-351, 2006. ,
DOI : 10.1145/1150019.1136515
Using Destination?Set Prediction to Improve the Latency/Bandwidth Tradeoff in Shared?Memory Multiprocessors, Proceedings of International Symposium on Computer Architecture, 2003. ,
Using supplier locality in power-aware interconnects and caches in chip multiprocessors, Journal of Systems Architecture, vol.54, issue.5, pp.507-518, 2007. ,
DOI : 10.1016/j.sysarc.2007.09.005
JETTY: filtering snoops for reduced energy consumption in SMP servers, Proceedings HPCA Seventh International Symposium on High-Performance Computer Architecture, 2001. ,
DOI : 10.1109/HPCA.2001.903254
TLB and Snoop Energy?Reduction Using Virtual Caches for Low?Power Chip?Multiprocessors, Proceeding of ACM International Symposium on Low Power Electronics and Design, 2002. ,
Space/time trade-offs in hash coding with allowable errors, Communications of the ACM, vol.13, issue.7 ,
DOI : 10.1145/362686.362692
Power Efficient Cache Coherence, High Performance Memory Systems, 2003. ,
Flexible Snooping, International Symposium on Computer Architecture, 2006. ,
DOI : 10.1145/1150019.1136514