E. S. Chung, E. Nurvitadhi, J. C. Hoe, B. Falsafi, and K. Mai, PROTO- FLEX: FPGA-accelerated Hybrid Functional Simulation, 2007.

E. S. Chung, E. Nurvitadhi, J. C. Hoe, B. Falsafi, and K. Mai, A complexity-effective architecture for accelerating full-system multiprocessor simulations using FPGAs, Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays , FPGA '08, pp.77-86, 2008.
DOI : 10.1145/1344671.1344684

M. Hill and A. Smith, Evaluating associativity in CPU caches, IEEE Transactions on Computers, vol.38, issue.12, pp.1612-1630, 1989.
DOI : 10.1109/12.40842

A. Nanda, K. K. Mak, K. Sugarvanam, R. K. Sahoo, V. Soundarararjan et al., MemorIES3: a programmable, real-time hardware emulation tool for multiprocessor server design, Proceedings of the ninth international conference on Architectural support for programming languages and operating systems, pp.37-48, 2000.