Correct and Energy-Efficient Design of SoCs: the H.264 Encoder Case Study

Adolf Abdallah 1 Abdoulaye Gamatié 1 Jean-Luc Dekeyser 1
1 DART - Contributions of the Data parallelism to real time
LIFL - Laboratoire d'Informatique Fondamentale de Lille, Inria Lille - Nord Europe
Abstract : This paper presents the design and analysis of a multimedia system-on-chip consisting of the H.264 encoder implemented on a multiprocessor architecture. A model-driven approach is adopted by using the standard MARTE profile of UML. An abstract clock analysis is applied to deal with the correctness of the system temporal properties and to find the most suitable execution platform configurations regarding the energy consumption. We claim that our approach allows for an early design space exploration, which is crucial when implementing modern complex systems.
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Communication dans un congrès
International Symposium on System-on-Chip (SoC'2010), Sep 2010, Tampere, Finland. 2010
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https://hal.inria.fr/inria-00522792
Contributeur : Mister Dart <>
Soumis le : vendredi 1 octobre 2010 - 17:40:04
Dernière modification le : jeudi 11 janvier 2018 - 06:22:13

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  • HAL Id : inria-00522792, version 1

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Adolf Abdallah, Abdoulaye Gamatié, Jean-Luc Dekeyser. Correct and Energy-Efficient Design of SoCs: the H.264 Encoder Case Study. International Symposium on System-on-Chip (SoC'2010), Sep 2010, Tampere, Finland. 2010. 〈inria-00522792〉

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