Reconfigurable Communication Networks in a Parametric SIMD Parallel System on Chip

Mouna Baklouti 1 Philippe Marquet 1, 2 Jean-Luc Dekeyser 1, 2 Mohamed Abid 3, 4
1 DART - Contributions of the Data parallelism to real time
LIFL - Laboratoire d'Informatique Fondamentale de Lille, Inria Lille - Nord Europe
2 LIFL - Laboratoire d'Informatique Fondamentale de Lille
3 CEM Lab - ENIS - Département de Génie Électrique de Sfax [ENIS]
4 CES Lab - Computer & Embedded Systems
Abstract : The SIMD parallel systems play a crucial role in the field of intensive signal processing. For most the parallel systems, communica- tion networks are considered as one of the challenges facing researchers. This work describes the FPGA implementation of two reconfigurable and flexible communication networks integrated into mppSoC. An mppSoC system is an SIMD massively parallel processing System on Chip de- signed for data-parallel applications. Its most distinguished features are its parameterization and the reconfigurability of its interconnection net- works. This reconfigurability allows to establish one configuration with a network topology well mapped to the algorithm communication graph so that higher efficiency can be achieved. Experimental results for mpp- SoC with different communication configurations demonstrate the per- formance of the used reconfigurable networks and the effectiveness of algorithm mapping through reconfiguration.
Keywords : Reconfigurable architectures communication networks SIMD processors parallel architectures FPGA
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Mouna Baklouti, Philippe Marquet, Jean-Luc Dekeyser, Mohamed Abid. Reconfigurable Communication Networks in a Parametric SIMD Parallel System on Chip. 6th International Symposium on Applied Reconfigurale Computing, ARC 2010, Mar 2010, Bangkok, Thailand. pp.110-121, ⟨10.1007/978-3-642-12133-3_12⟩. ⟨inria-00524987⟩

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