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Models for Co-Design of Heterogeneous Dynamically Reconfigurable SoCs

Jean-Luc Dekeyser 1, 2 Abdoulaye Gamatié 1, 2 Samy Meftali 1, 2 Imran Rafiq Quadri 1 
1 DART - Contributions of the Data parallelism to real time
LIFL - Laboratoire d'Informatique Fondamentale de Lille, Inria Lille - Nord Europe
Abstract : The design of Systems-on-Chip is becoming an increasing difficult challenge due to the continuous exponential evolution of the targeted complex architectures and applications. Thus, seamless methodologies and tools are required to resolve the SoC design issues. This chapter presents a high level component based approach for expressing system reconfigurability in SoC co-design. A generic model of reactive control is presented for Gaspard2, a SoC co-design framework. Control integration in different levels of the framework is explored along with a comparison of their advantages and disadvantages. Afterwards, control integration at another high abstraction level is investigated which proves to be more beneficial then the other alternatives. This integration allows to integrate reconfigurability features in modern SoCs. Finally a case study is presented for validation purposes. The presented works are based on Model-Driven Engineering (MDE) and UML MARTE profile for modeling and analysis of real-time embedded systems.
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Jean-Luc Dekeyser, Abdoulaye Gamatié, Samy Meftali, Imran Rafiq Quadri. Models for Co-Design of Heterogeneous Dynamically Reconfigurable SoCs. Nicolescu, Gabriela; O'Connor, Ian; Piguet, Christian. Heterogeneous Embedded Systems - Design Theory and Practice, Springer, 26 p., 2012. ⟨inria-00525023⟩

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