F. Guo, H. Kannan, L. Zhao, R. Illikkal, R. Iyer et al., From chaos to QoS, ACM SIGARCH Computer Architecture News, vol.35, issue.1, 2007.
DOI : 10.1145/1241601.1241608

G. Guo, Y. Solihin, L. Zhao, and R. Iyer, A framework for providing quality of service in chip multiprocessors, Proceedings of the 40th Annual International Symposium on Microarchitecture, 2007.

R. Iyer, CQoS, Proceedings of the 18th annual international conference on Supercomputing , ICS '04, 2004.
DOI : 10.1145/1006209.1006246

R. Iyer, L. Zhao, F. Guo, R. Illikkal, S. Makineni et al., QoS policies and architecture for cache/memory in CMP platforms, Proceedings of the ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems, 2007.

A. Jaleel, K. B. Theobald, S. C. Steely-jr, and J. Emer, High performance cache replacement using re-reference interval prediction (RRIP), Proceedings of the 37th Annual International Symposium on Computer Architecture, 2010.

S. Kim, D. Chandra, and Y. Solihin, Fair cache sharing and partitioning in a chip multiprocessor architecture, Proceedings of the 13th International Conference on Parallel Architectures and Compilation Techniques, 2004.

P. Kongetira, K. Aingaran, and K. Olukotun, Niagara: A 32-Way Multithreaded Sparc Processor, IEEE Micro, vol.25, issue.2, 2005.
DOI : 10.1109/MM.2005.35

C. Luk, R. Cohn, R. Muth, H. Patil, A. Klauser et al., Pin : building customized program analysis tools with dynamic instrumentation, Proceedings of the ACM SIGPLAN conference on Programming Language Design and Implementation, 2005.

P. Michaud, Replacement policies for shared caches on symmetric multicores, Proceedings of the 6th International Conference on High Performance and Embedded Architectures and Compilers, HiPEAC '11, 2008.
DOI : 10.1145/1944862.1944890
URL : https://hal.archives-ouvertes.fr/inria-00531188

P. Michaud, The 3P and 4P cache replacement policies, Proceedings of the 1st JILP Workshop on Computer Architecture Competitions, Cache Replacement Championship, 2010.
URL : https://hal.archives-ouvertes.fr/inria-00492968

K. J. Nesbit, J. Laudon, and J. E. Smith, Virtual private caches, Proceedings of the 34th International Symposium on Computer Architecture, 2007.

M. Qureshi, A. Jaleel, Y. N. Patt, S. C. Steely-jr, and J. Emer, Adaptive insertion policies for high performance caching, Proceedings of the 34th Annual International Symposium on Computer Architecture, 2007.

N. Rafique, W. Lim, and M. Thottethodi, Architectural support for operating system-driven CMP cache management, Proceedings of the 15th international conference on Parallel architectures and compilation techniques , PACT '06, 2006.
DOI : 10.1145/1152154.1152160

H. S. Stone, J. Turek, and J. L. Wolf, Optimal partitioning of cache memory, IEEE Transactions on Computers, vol.41, issue.9, pp.1054-1068, 1992.
DOI : 10.1109/12.165388

J. Zebchuk, S. Makineni, and D. Newell, Re-examining cache replacement policies, 2008 IEEE International Conference on Computer Design, 2008.
DOI : 10.1109/ICCD.2008.4751933