Towards Automatic Accuracy Validation and Optimization of Fixed-Point Hardware Descriptions in SystemC

Arnaud Tisserand

Conference Papers Year : 2010

Towards Automatic Accuracy Validation and Optimization of Fixed-Point Hardware Descriptions in SystemC

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Arnaud Tisserand

Function : Author
PersonId : 3616
IdHAL : arnaud-tisserand
ORCID : 0000-0001-7042-3541
IdRef : 060154160

Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources

Keywords

computer arithmetic fixed-point arithmetic operator accuracy rounding error integrated circuit hardware description language

Domains

Computer Science [cs] Computer Arithmetic Engineering Sciences [physics] Micro and nanotechnologies/Microelectronics

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https://hal.inria.fr/inria-00536554

Submitted on : Tuesday, November 16, 2010-2:07:16 PM

Last modification on : Wednesday, February 2, 2022-3:52:44 PM

Dates and versions

inria-00536554 , version 1 (16-11-2010)

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HAL Id : inria-00536554 , version 1

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Arnaud Tisserand. Towards Automatic Accuracy Validation and Optimization of Fixed-Point Hardware Descriptions in SystemC. 14th GAMM-IMACS International Symposium on Scientific Computing, Computer Arithmetic and Validated Numerics (SCAN), Sep 2010, Lyon, France. ⟨inria-00536554⟩

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Towards Automatic Accuracy Validation and Optimization of Fixed-Point Hardware Descriptions in SystemC

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