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Towards Automatic Accuracy Validation and Optimization of Fixed-Point Hardware Descriptions in SystemC

Arnaud Tisserand 1
1 CAIRN - Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources
IRISA-D3 - ARCHITECTURE, Inria Rennes – Bretagne Atlantique
Keywords : computer arithmetic fixed-point arithmetic operator accuracy rounding error integrated circuit hardware description language
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Conference papers
Complete list of metadatas
https://hal.inria.fr/inria-00536554
Contributor : Arnaud Tisserand <>
Submitted on : Tuesday, November 16, 2010 - 2:07:16 PM
Last modification on : Friday, January 8, 2021 - 3:12:40 AM

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  • HAL Id : inria-00536554, version 1

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CNRS | INRIA | UNIV-RENNES1 | IRISA | IRISA-D3 | INSTITUT-TELECOM | UR1-UFR-ISTIC | UNIV-RENNES | INSA-RENNES

Citation

Arnaud Tisserand. Towards Automatic Accuracy Validation and Optimization of Fixed-Point Hardware Descriptions in SystemC. 14th GAMM-IMACS International Symposium on Scientific Computing, Computer Arithmetic and Validated Numerics (SCAN), Sep 2010, Lyon, France. ⟨inria-00536554⟩

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