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Conference papers

Task placement for dynamic and partial reconfigurable architecture

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https://hal.inria.fr/inria-00536714
Contributor : Sébastien Pillement <>
Submitted on : Tuesday, November 16, 2010 - 6:00:23 PM
Last modification on : Wednesday, December 18, 2019 - 4:57:53 PM

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  • HAL Id : inria-00536714, version 1

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Antoine Eiche, Daniel Chillet, Sébastien Pillement, Olivier Sentieys. Task placement for dynamic and partial reconfigurable architecture. Conference on Design and Architectures for Signal and Image Processing, Oct 2010, Edimbourg, United Kingdom. ⟨inria-00536714⟩

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