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Open Power and Energy Optimization Platform and Estimator (Open-People) ANR Project

Daniel Chillet 1 Eric Senn 2 Olivier Zendra 3 Cécile Belleudy 4 Smail Niar 5, 6 Victor Tissier 7 Christian Samoyeau
1 CAIRN - Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources
Inria Rennes – Bretagne Atlantique , IRISA-D3 - ARCHITECTURE
2 Lab-STICC_UBS_CACS_MOCS
Lab-STICC - Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance
3 TRIO - Real time and interoperability
INRIA Lorraine, LORIA - Laboratoire Lorrain de Recherche en Informatique et ses Applications
4 LEAT - Laboratoire d'Electronique, Antennes et Télécommunications
5 LAMIH - Laboratoire d'Automatique, de Mécanique et d'Informatique industrielles et Humaines - UMR 8201
6 DART - Contributions of the Data parallelism to real time
LIFL - Laboratoire d'Informatique Fondamentale de Lille, Inria Lille - Nord Europe
7 Thales Research and Technology [Palaiseau]
Abstract : Designing low power complex embedded systems is now a critical challenge for a large number of electronic corporations. Low power is generally critical due to its impact on lifetime, battery longevity, battery capacity, temperature constraints, etc. Unfortunately, when a designer needs some power estimations about its design, the methods and tools which can help him are not sufficient. Indeed, there is a lack of efficient methodology and accurate tool to obtain power/energy estimation of a complete system at different abstraction levels. This paper addresses this problem and proposes a global framework for power/energy estimation and optimization of heterogeneous MultiProcessor System on Chip (MPSoC). This framework supports both a power modeling methodology and a power platform estimations which can help the designer to choose the best solution for his design. The methodology supported takes into account all the embedded system's relevant aspects; the software, the hardware, and the operating system. It includes several estimation tools with respect to their abstraction levels in order to cover the overall design flow. Starting from functional estimation and down to real boards measurements, our platform helps designers to develop new power models, to explore new architectures, and to apply optimization techniques in order to reduce energy and power consumption of the system. The usefulness and the effectiveness of the proposed power estimation framework are demonstrated through a typical embedded system conceived around the Xilinx Virtex II Pro FPGA platform.
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Conference papers
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https://hal.inria.fr/inria-00542951
Contributor : Daniel Chillet <>
Submitted on : Saturday, December 4, 2010 - 2:05:34 PM
Last modification on : Saturday, July 11, 2020 - 3:15:39 AM

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IRISA | INRIA | UNICE | INSTITUT-TELECOM | UNIV-RENNES1 | CNRS | LAB-STICC | IRISA-D3 | UNIV-BREST | INRIA-MECSCI | UNIV-LILLE3 | LORIA | UR1-UFR-ISTIC | UNIV-LORRAINE | ENIB | LAB-STICC_ENIB | UNIV-COTEDAZUR | UNIV-RENNES | UNIV-VALENCIENNES | LAB-STICC_UBS | UBS | INSA-RENNES

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Daniel Chillet, Eric Senn, Olivier Zendra, Cécile Belleudy, Smail Niar, et al.. Open Power and Energy Optimization Platform and Estimator (Open-People) ANR Project. DSD 2012 - 15th Euromicro Conference on Digital System Design, Sep 2012, Izmir, Turkey. pp.16, ⟨10.1109/DSD.2012.98⟩. ⟨inria-00542951⟩

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