Skip to Main content Skip to Navigation
Reports

A NUMA Aware Scheduler for a Parallel Sparse Direct Solver

Abstract : Over the past few years, parallel sparse direct solvers made significant progress and are now able to solve efficiently industrial three-dimensional problems with several millions of unknowns. To solve efficiently these problems, PaStiX and WSMP solvers for example, provide an hybrid MPI-thread implementation well suited for SMP nodes or multi-core architectures. It enables to drastically reduce the memory overhead of the factorization and improve the scalability of the algorithms. However, today's modern architectures introduce new hierarchical memory accesses that are not handle in these solvers. We present in this paper three improvements on PaStiX solver to improve the performance on modern architectures : memory allocation, communication overlap and dynamic scheduling and some results on numerical test cases will be presented to prove the efficiency of the approach on NUMA architectures.
Complete list of metadatas

Cited literature [15 references]  Display  Hide  Download

https://hal.inria.fr/inria-00549827
Contributor : Mathieu Faverge <>
Submitted on : Wednesday, December 22, 2010 - 5:53:21 PM
Last modification on : Thursday, December 13, 2018 - 6:48:11 PM
Document(s) archivé(s) le : Monday, November 5, 2012 - 2:46:39 PM

File

RR-7498.pdf
Files produced by the author(s)

Identifiers

  • HAL Id : inria-00549827, version 1

Collections

Citation

Mathieu Faverge, Xavier Lacoste, Pierre Ramet. A NUMA Aware Scheduler for a Parallel Sparse Direct Solver. [Research Report] RR-7498, INRIA. 2010, pp.22. ⟨inria-00549827⟩

Share

Metrics

Record views

783

Files downloads

459