Exploiting Reconfigurable SWP Operators for Multimedia Applications

Daniel Menard 1 Nguyen Hai Nam 1 François Charot 1 Stéphane Guyetant 2 Jérémie Guillot 3 Erwan Raffin 1 Emmanuel Casseau 1
1 CAIRN - Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources
IRISA-D3 - ARCHITECTURE, Inria Rennes – Bretagne Atlantique
2 LIST - Laboratoire d'Intégration des Systèmes et des Technologies
3 LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : Implementing image processing applications in embedded systems is a difficult challenge due to the drastic constraints in terms of cost, energy consumption and real time execution. Reconfigurable archi- tectures are good candidates to take-up this challenge and especially when the architecture is able to support different word-lengths of pixel through Sub-Word Parallelism (SWP) capabilities. Exploiting the diversity of supported data-types requires automation tools able to optimize the data word-length under an accuracy constraint. In this paper, a new approach for word-length optimization in the case of SWP operations is proposed. Compared to existing approaches the optimization time is significantly reduced without sacrificing the quality of the optimized solution. The results show the ability of our approach to exploit the SWP capabilities associated with multimedia processors.
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Daniel Menard, Nguyen Hai Nam, François Charot, Stéphane Guyetant, Jérémie Guillot, et al.. Exploiting Reconfigurable SWP Operators for Multimedia Applications. ICASSP: International Conference on Acoustics, Speech and Signal Processing, May 2011, Prague, Czech Republic. ⟨inria-00567017⟩

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