R. Buchmann and A. Greiner, A fully static scheduling approach for fast cycle accurate systemC simulation of MPSoCs, 2007 Internatonal Conference on Microelectronics, pp.101-104, 2007.
DOI : 10.1109/ICM.2007.4497671

URL : https://hal.archives-ouvertes.fr/hal-01311547

O. , U. Profile, and . Marte, Modeling and Analysis of Real- Time Embedded Systems, 2009.

. Dart, Gaspard2 framework, 2009.

R. B. Atitallah, S. Niar, A. Greiner, S. Meftali, and J. L. Dekeyser, Estimating Energy Consumption for an MPSoC Architectural Exploration, Proceedings of the ARCS,v o l . 3894 of Lecture Notes in Computer Science, pp.298-310, 2006.
DOI : 10.1007/11682127_21

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.77.5616

M. Andersson and P. Kuivalainen, Spice macromodel for power dmos transistors, Proceedings of the Nordic Semiconductor Meeting, 1992.

. Synopsys, Synopsys low power solutions for asic design flow, Tech. Rep., Synopsys, 1998.

C. Rowen, Reducing SoC simulation and development time, Computer, vol.35, issue.12, pp.29-34, 2002.
DOI : 10.1109/MC.2002.1106176

J. Costa, J. Monteiro, L. M. Silveira, and . Devadas, Aprobabilistic approach for rt-level power modeling, Proceedings of the 16th IEEE International Conference on Electronics, Circuits and Systems, Cyprus, 1999.

Q. , Q. Q-i-u, and M. , P e d r a m ,a n dC .S .D i n g C y c l e -a c c u r a t e macro-models for RT-level power analysis, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, pp.520-528, 1998.

R. P. Llopis and K. Goossens, Petrol approach to highlevel power estimation, Proceedings of the International Symposium on Low Power Electronics and Design, pp.130-132, 1998.
DOI : 10.1145/280756.280830

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.43.1716

L. Benini, D. Bertozzi, A. Bogliolo, F. Menichelli, and M. Olivieri, MPARM: Exploring the Multi-Processor SoC Design Space with SystemC, Journal of VLSI signal processing systems for signal, image and video technology, vol.41, issue.2, pp.169-182, 2005.
DOI : 10.1007/s11265-005-6648-1

W. Ye, N. Vijaykrishnan, M. Kandemir, and M. J. Irwin, The design and use of simplepower, Proceedings of the 37th conference on Design automation , DAC '00, pp.340-345, 2000.
DOI : 10.1145/337292.337436

M. Loghi, M. Poncino, and L. Benini, Cycle-accurate power analysis for multiprocessor systems-on-a-chip, Proceedins of the 14th ACM Great Lakes symposium on VLSI , GLSVLSI '04, pp.401-406, 2004.
DOI : 10.1145/988952.989049

D. Ludovici, G. Keramidas, G. N. Gaydadjiev, and S. Kaxiras, Integration of power saving techniques in the unisim simulation framework through the shadow module design paradigm, Rapid Simulation and Performance Evaluation, 2009.

A. Donlin, Transaction level modeling, Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis , CODES+ISSS '04, pp.75-80, 2004.
DOI : 10.1145/1016720.1016742

Y. Lo, S. Abdi, and D. Gajski, Transaction level model automation for multicore systems, Proceedings of the 38th DAC Conference, 2009.

I. Lee, H. Kim, and P. Yang, P, Proceedings of the 2006 conference on Asia South Pacific design automation , ASP-DAC '06, pp.551-558, 2006.
DOI : 10.1145/1118299.1118431

URL : https://hal.archives-ouvertes.fr/jpa-00224550

N. Dhanwada, I. C. Lin, and V. Narayanan, A power estimation methodology for systemC transaction level models, Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, CODES+ISSS '05, pp.142-147, 2005.
DOI : 10.1145/1084834.1084874

R. B. Atitallah, S. Niar, and J. Dekeyser, MPSoC power estimation framework at transaction level modeling, 2007 Internatonal Conference on Microelectronics, pp.245-248, 2007.
DOI : 10.1109/ICM.2007.4497703

V. Tiwari, S. Malik, and A. Wolfe, Power analysis of embedded software: a first step towards software power minimization, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, pp.437-445, 1994.

A. Sinha and A. P. Chandrakasan, JouleTrack-a Web based tool for software energy profiling, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232), pp.220-225, 2001.
DOI : 10.1109/DAC.2001.935508

N. Julien, J. Laurent, E. Senn, and E. Martin, Power Estimation of a C Algorithm Based on the Functional-Level Power Analysis of a Digital Signal Processor, Proceedings of the 4th International Symposium on High Performance Computing (ISHPC '02), 2002.
DOI : 10.1007/3-540-47847-7_32

URL : https://hal.archives-ouvertes.fr/hal-00077553

E. Senn, J. Laurent, N. Julien, and E. Martin, SoftExplorer: Estimation, Characterization, and Optimization of the Power and Energy Consumption at the Algorithmic Level, Proceedings of the IEEE PATMOS, pp.342-351, 2004.
DOI : 10.1007/978-3-540-30205-6_36

URL : https://hal.archives-ouvertes.fr/hal-00013977

M. F. Oliveira, L. B. De-brisolara, L. Carro, and F. R. Wagner, Early embedded software design space exploration using UML-based estimation, Proceedings of the 17th IEEE International Workshop on Rapid System Prototyping (RSP '06), pp.24-32, 2006.

M. F. Das, E. W. Oliveira, F. A. Bri?aobri?-bri?ao, F. R. Nascimento, and . Wagner, Model driven engineering for mpsoc design space exploration, Proceedings of the 20th Annual Conference on Integrated Circuits and Systems Design (SBCCI '07),R i od e Janeiro, 2007.

E. Senn, J. Laurent, E. Juin, and J. P. Diguet, Refining power consumption estimations in the component based AADL design flow, 2008 Forum on Specification, Verification and Design Languages, pp.173-178, 2008.
DOI : 10.1109/FDL.2008.4641441

URL : https://hal.archives-ouvertes.fr/hal-00370813

S. D-h-o-u-i-b, E. S-e-n-n, J. D-i-g-u-e-t, and J. , Model driven high-level power estimation of embedded operating systems communication services, Proceedings of the International Conference on Embedded Software and Systems (ICESS '09), pp.475-481, 2009.

T. Arpinen, E. Salminen, T. D. Hamalainen, and M. Hannikainen, MARTE profile extension for modeling dynamic power management of embedded systems, Proceedings of the W6 1st Workshop on Model Based Engineering for Embedded Systems Design (M-BED '10), 2010.
DOI : 10.1016/j.sysarc.2011.01.003

S. Sendall and W. Kozaczynski, Model transformation: the heart and soul of model-driven software development, IEEE Software, vol.20, issue.5, pp.42-45, 2003.
DOI : 10.1109/MS.2003.1231150

T. Mens and P. V. Gorp, A Taxonomy of Model Transformation, Proceedings of the International Workshop on Graph and Model Transformation (GraMoT '05), pp.125-142, 2006.
DOI : 10.1016/j.entcs.2005.10.021

P. Stevens, A Landscape of Bidirectional Model Transformations, Proceedings of the GTTSE, 2007.
DOI : 10.1007/978-3-540-88643-3_10

. Acceleo, MDA Generator Home

. Soclib, Soclib project: an integrated system-on-chip modeling and simulation platform, Tech. Rep., CNRS, 2003.

. Papyrus, Papyrus: Open Source Toolfor Graphical UML2 Modelling