Deadlock free control synthesis for partially controllable marked graphs

Hatem Sioud 1 Alexandre Sava 1 Z. Achour Nidhal Rezg 1
1 COSTEAM - Optimal and secure management of manufacturing systems
Inria Nancy - Grand Est, UPVM - Université Paul Verlaine - Metz
Abstract : This paper deals with the problem of deadlock avoidance in control synthesis for a discrete event systems modeled by marked graphs. The specifications are modeled by General Mutual Exclusion Constraints. We show that, even that the system to be controlled is live, the restriction introduced by the controller may generate deadlocks. Therefore, the research work we present in this paper focuses on enhancing an existing control synthesis technique in order to provide a deadlock free maximal permissive control law.
Type de document :
Communication dans un congrès
Pierre Borne and Filip Florin Gheorghe. 12th IFAC Symposium on Large Scale Systems: Theory and Applications - LSS 2010, 2010, Lille, France. 9, 2010, 〈10.3182/20100712-3-FR-2020.00030〉
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https://hal.inria.fr/inria-00600962
Contributeur : Ist Inria Nancy Grand Est <>
Soumis le : jeudi 16 juin 2011 - 12:09:53
Dernière modification le : mardi 27 février 2018 - 15:44:03

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Hatem Sioud, Alexandre Sava, Z. Achour, Nidhal Rezg. Deadlock free control synthesis for partially controllable marked graphs. Pierre Borne and Filip Florin Gheorghe. 12th IFAC Symposium on Large Scale Systems: Theory and Applications - LSS 2010, 2010, Lille, France. 9, 2010, 〈10.3182/20100712-3-FR-2020.00030〉. 〈inria-00600962〉

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