Program Analysis and Source-Level Communication Optimizations for High-Level Synthesis

Christophe Alias 1 Alain Darte 1 Alexandru Plesco 1
1 COMPSYS - Compilation and embedded computing systems
Inria Grenoble - Rhône-Alpes, LIP - Laboratoire de l'Informatique du Parallélisme
Abstract : The use of hardware accelerators, e.g., with GPGPUs or customized circuits using FPGAs, are particularly interesting for accelerating data- and compute-intensive applications. However, to get high performance, it is mandatory to restructure the application code, to generate adequate communication mechanisms, and to compile the different communicating processes so that the resulting application is highly-optimized, with full usage of the memory bandwidth. In the context of the high-level synthesis (HLS) of hardware accelerators, we show how to automatically generate such an optimized organization for an accelerator communicating to an external DDR memory. Our technique relies on loop tiling, the generation of pipelined processes (overlapping communications & computations), and the automatic design (synchronizations and sizes) of local buffers. Our first contribution is a program analysis that specifies the data to be read from and written to the external memory so as to reduce communications and reuse data as much as possible in the accelerator. This specification, which can be used in different contexts, handles the cases where data can be redefined in the accelerator and/or approximations are needed because of non-analyzable data accesses. Our second contribution is an optimized code generation scheme, entirely at source-level, that allows us to compile all the necessary glue (the communication processes) with the same HLS tool as for the computation kernel. Both contributions use advanced polyhedral techniques for program analysis and transformation. Experiments with Altera HLS tools show the correctness and efficiency of our technique.
Complete list of metadatas

Cited literature [16 references]  Display  Hide  Download

https://hal.inria.fr/inria-00601822
Contributor : Alain Darte <>
Submitted on : Monday, July 25, 2011 - 5:15:48 PM
Last modification on : Wednesday, November 20, 2019 - 2:30:49 AM
Long-term archiving on: Wednesday, October 26, 2011 - 2:20:12 AM

File

RR-7648.pdf
Files produced by the author(s)

Identifiers

  • HAL Id : inria-00601822, version 1

Collections

Citation

Christophe Alias, Alain Darte, Alexandru Plesco. Program Analysis and Source-Level Communication Optimizations for High-Level Synthesis. [Research Report] RR-7648, INRIA. 2011, pp.16. ⟨inria-00601822⟩

Share

Metrics

Record views

301

Files downloads

201