Variability in architectural simulations of multi-threaded workloads, HPCA '03: Proceedings of the 9th International Symposium on High-Performance Computer Architecture, 2003. ,
Quantifying the impact of input data sets on program behavior and its applications, J. Instruction-Level Parallelism, vol.5, 2003. ,
Collective Optimization, The 4th International Conference on High Performance and Embedded Architectures and Compilers (HIPEAC), 2009. 4. Intel Corporation. Intel C++ Compiler 11.1 User and Reference Guides ,
URL : https://hal.archives-ouvertes.fr/inria-00445326
Trinitis, et al. autopin?Automated Optimization of Thread-to-Core Pinning on Multicore Systems. Transactions on High-Performance Embedded Architectures and Compilers, 2008. ,
Raced Profiles: Efficient Selection of Competing Compiler Optimizations, Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES '09), 2009. ,
Measuring and Analysing the Variations of Program Execution Times on Multicore Platforms: Case Study, 2010. ,
URL : https://hal.archives-ouvertes.fr/inria-00514548
Study of Variations of Native Program Execution Times on Multi-Core Architectures, 2010 International Conference on Complex, Intelligent and Software Intensive Systems, pp.919-924, 2010. ,
DOI : 10.1109/CISIS.2010.96
URL : https://hal.archives-ouvertes.fr/hal-00643731
The Art of Computer Systems Performance Analysis : Techniques for Experimental Design, Measurement , Simulation, and Modelling, 1991. ,
The Speedup-Test, 2010. ,
URL : https://hal.archives-ouvertes.fr/inria-00443839