« Cache-related preemption delay via useful cache blocks: Survey and redefinition, Journal of Systems Architecture, vol.57, p.33, 2011. ,
DOI : 10.1016/j.sysarc.2010.08.006
« An EDF-based restricted-migration scheduling algorithm for multiprocessor soft real-time systems, Real-Time Systems, vol.38, p.31, 2008. ,
Proceedings. 22nd IEEE, Static-priority scheduling on multiprocessors, p.31, 2001. ,
« A time-predictable stack cache, Object/Component/Service-Oriented Real-Time Distributed Computing (ISORC), p.22, 2013. ,
DOI : 10.1109/isorc.2013.6913225
URL : http://www.jopdesign.com/doc/patstack.pdf
, Data flow languages, vol.2, p.18, 1982.
DOI : 10.1109/mc.1982.1653938
« A generic and compositional framework for multicore response time analysis, Proceedings of the 23rd International Conference on Real Time and Networks Systems, p.65, 2015. ,
« Cache related pre-emption delay aware response time analysis for fixed priority pre-emptive systems, Real-Time Systems Symposium (RTSS), p.33, 2011. ,
« Building timing predictable embedded systems, ACM Transactions on Embedded Computing Systems (TECS), vol.13, p.24, 2014. ,
DOI : 10.1145/2560033
URL : http://dl.acm.org/ft_gateway.cfm?id=2560033&type=pdf
« Time-predictable execution of multithreaded applications on multicore systems, Design, Automation and Test in Europe Conference and Exhibition (DATE), pp.1-6, 2014. ,
« Memory efficient global scheduling of real-time tasks, Real-Time and Embedded Technology and Applications Symposium (RTAS), vol.89, p.25, 2015. ,
Stack-based scheduling of realtime processes, RealTime Systems, vol.3, p.33, 1991. ,
« Partitioned scheduling of sporadic task systems: an ILP-based approach, Proceedings of the 2008 Conference on Design and Architectures for Signal and Image Processing, vol.30, p.12, 2008. ,
« Limited preemptive scheduling for real-time systems. a survey, IEEE Transactions on Industrial Informatics, vol.9, issue.1, p.30, 2013. ,
« The ESTEREL synchronous programming language and its mathematical semantics, International Conference on Concurrency, p.20, 1984. ,
, Generalized multiframe tasks, vol.17, p.18, 1999.
« Maximizing parallelism without exploding deadlines in a mixed criticality embedded system, Real-Time Systems (ECRTS), p.66, 2016. ,
« Formulating integer linear programs: A rogues' gallery, INFORMS Transactions on Education, pp.153-159, 2007. ,
« Contention-free execution of automotive applications on a clustered many-core platform, Real-Time Systems (ECRTS), vol.85, p.66, 2016. ,
, Handbook of Signal Processing Systems, p.20, 2013.
« Partitioned EDF scheduling for multiprocessors using a C = D task splitting scheme, RealTime Systems, vol.48, p.32, 2012. ,
DOI : 10.1007/s11241-011-9126-9
, IEEE Transactions on signal processing, vol.44, p.20, 1996.
, Schloss Dagstuhl-Leibniz-Zentrum f"ur Informatik, vol.4, p.22, 2006.
« Scheduling multi-rate real-time applications on clustered many-core architectures with memory constraints, Proceedings of the 23rd Asia and South Pacific Design Automation Conference, pp.560-567, 2018. ,
DOI : 10.1109/aspdac.2018.8297382
« A memorycentric approach to enable timing-predictability within embedded many-core accelerators, Real-Time and Embedded Systems and Technologies (RTEST), p.25, 2015. ,
« Systemlevel scheduling of real-time streaming applications using a semi-partitioned approach, Proceedings of the conference on Design, Automation & Test in Europe, p.32, 2014. ,
Scheduling of synchronous data flow models on scratchpad memory based embedded processors, Computer-Aided Design (ICCAD), p.29, 2010. ,
Scheduling of stream programs onto SPM enhanced processors with code overlay, Embedded Systems for Real-Time Multimedia (ESTIMedia), 2011 9th IEEE Symposium on, vol.89, p.29, 2011. ,
DOI : 10.1109/estimedia.2011.6088530
, Memory Bank Partitioning for Fixed-Priority Tasks in a Multi-core System, vol.89, p.35, 2017.
« Automatic extraction of pipeline parallelism for embedded heterogeneous multi-core platforms, Compilers, Architecture and Synthesis for Embedded Systems (CASES), 2013 International Conference on, p.20, 2013. ,
, Proceedings of the 5th ACM international conference on Embedded software, p.29, 2005.
« Energy optimal task scheduling with normally-off local memory and sleep-aware shared memory with access conflict, IEEE Transactions on Computers, vol.1, p.30, 2018. ,
DOI : 10.1109/tc.2018.2805337
, Approximation algorithms for bin packing: a survey, pp.46-93, 1996.
, What is a Timing Anomaly? », in: OASIcs-OpenAccess Series in Informatics, vol.23, p.22, 2012.
« Stream compilation for real-time embedded multicore systems, CGO 2009. International symposium on, vol.87, pp.210-220, 2009. ,
« Multi-objective aware extraction of tasklevel parallelism using genetic algorithms, Design, Automation & Test in Europe Conference & Exhibition (DATE), p.20, 2012. ,
« Executing synchronous dataflow graphs on a SPM-based multicore architecture, Proceedings of the 49th Annual Design Automation Conference, p.69, 2012. ,
« An experimental evaluation of list scheduling, p.44, 1998. ,
« A survey of hard real-time scheduling algorithms for multiprocessor systems, ACM Computing Surveys, 2011. ,
« Predictable flight management system implementation on a multicore processor, Embedded Real Time Software (ERTS'14), 2014. ,
Özcan Özturk, and Jens Palsberg, « A decoupled local memory allocator, ACM Transactions on Architecture and Code Optimization (TACO), vol.9, p.88, 2013. ,
« A method cache for Patmos, Object/Component/Service-Oriented Real-Time Distributed Computing (ISORC), p.22, 2014. ,
« On a real-time scheduling problem, Operations research, vol.26, p.31, 1978. ,
« Shared cache aware task mapping for WCRT minimization, Design Automation Conference (ASP-DAC), 2013 18th Asia and South Pacific, p.33, 2013. ,
« Multiprocessor online scheduling of hard-real-time tasks, IEEE Transactions on software engineering 15, vol.12, p.29, 1989. ,
, High Performance Computing and Communication & 2012 IEEE 9th International Conference on Embedded Software and Systems (HPCC-ICESS), p.65, 2012.
« A framework for memory contention analysis in multi-core platforms, Real-Time Systems, vol.52, p.65, 2016. ,
« WCET-directed dynamic scratchpad memory allocation of data, Real-Time Systems ,
task graphs for free, Proceedings of the 6th international workshop on Hardware/software codesign, pp.97-101, 1998. ,
« Time-critical computing on a single-chip massively parallel processor, Design, Automation and Test in Europe Conference and Exhibition (DATE), pp.1-6, 2014. ,
, ACM Computing Surveys (CSUR), vol.9, pp.103-129, 1977.
« Fixed-priority schedulability of sporadic tasks on uniprocessors is np-hard, Real-Time Systems Symposium (RTSS, p.2017 ,
, IEEE, pp.139-146, 2017.
, Contention in multicore hardware shared resources: Understanding of the state of the art, vol.39, p.32, 2014.
A framework for prototyping custom hardware design flows, 2013 IEEE 13th International Working Conference on Source Code Analysis and Manipulation (SCAM), p.20, 2013. ,
, Dependable Systems and Networks, 2002. DSN 2002. Proceedings. International Conference on, p.12, 2002.
« A comparison of MPCP and MSRP when sharing resources in the Janus multiple, Real-Time and Embedded Technology and Applications Symposium, 2003. Proceedings. The 9th IEEE, p.33, 2003. ,
« Periodicity of real-time schedules for dependent periodic tasks on identical multiprocessor platforms, Real-time systems, vol.52, p.30, 2016. ,
« Back to basics: Homogeneous representations of multi-rate synchronous dataflow graphs, Formal Methods and Models for Codesign (MEMOCODE), 2013 Eleventh IEEE/ACM International Conference on, p.19, 2013. ,
On the Scalability of Constraint Solving for Static/Off-Line RealTime Scheduling, Formal Modeling and Analysis of Timed Systems, p.30, 2015. ,
URL : https://hal.archives-ouvertes.fr/hal-01250010
« Minimizing memory utilization of real-time task sets in single and multi-processor systems, RealTime Systems Symposium, p.33, 2001. ,
Linear and nonlinear optimization, vol.108, p.41, 2009. ,
, The hierarchical task graph as a universal intermediate representation, vol.22, p.20, 1994.
« Exploiting DMA to enable non-blocking execution in Decoupled Threaded Architecture, Parallel & Distributed Processing, vol.88, p.27, 2009. ,
, Bounds for certain multiprocessing anomalies, vol.45, p.44, 1966.
Lothar Thiele, and Benoît Dupont de Dinechin, « Mixed-criticality scheduling on cluster-based manycores with shared communication and storage resources, Real-Time Systems, vol.52, p.66, 2016. ,
« Exploiting coarsegrained task, data, and pipeline parallelism in stream programs, ACM SIGOPS Operating Systems Review, vol.40, p.24, 2006. ,
« A stream compiler for communication-exposed architectures, ACM SIGPLAN Notices, vol.37, p.89, 2002. ,
, Response Time Analysis of Synchronous Data Flow Programs on a Many-core Processor », in: In proceedings of the 24th International Conference on Real-Time Networks and Systems, 2016.
« Using bypass to tighten WCET estimates for multi-core processors with shared instruction caches, Real-Time Systems Symposium, vol.33, p.32, 2009. ,
« WCET driven design space exploration of an object cache, Proceedings of the 8th International Workshop on Java Technologies for Real-Time and Embedded Systems, p.22, 2010. ,
« The Heptane Static WorstCase Execution Time Estimation Tool, 17th International Workshop on WorstCase Execution Time Analysis (WCET 2017), vol.8, p.112, 2017. ,
« Towards compositionality in execution time analysis: definition and challenges, ACM SIGBED Review, vol.12, p.22, 2015. ,
DOI : 10.1145/2752801.2752805
Federated Scheduling of Parallel Real-Time Tasks on Multiprocessors, p.32, 2017. ,
« Finding response times in a real-time system, The Computer Journal, vol.29, p.32, 1986. ,
« A contentionsensitive fine-grained locking protocol for multiprocessor real-time systems, Proceedings of the 23rd International Conference on Real Time and Networks Systems, p.33, 2015. ,
« WCET-aware dynamic code management on scratchpads for software-managed multicores, Real-Time and Embedded Technology and Applications Symposium (RTAS), pp.179-188, 2014. ,
« Bounding memory interference delay in COTS-based multi-core systems, Real-Time and Embedded Technology and Applications Symposium (RTAS), p.66, 2014. ,
, Timon Kelter, « WCET analysis and optimization for multi-core real-time systems, p.28, 2015.
« Evaluation of resource arbitration methods for multi-core real-time systems, OASIcs-OpenAccess Series in Informatics, vol.30, 2013. ,
, An architecture for software-controlled data prefetching, vol.19, p.88, 1991.
« Orchestrating the execution of stream programs on multicore platforms, ACM SIGPLAN Notices, vol.43, pp.114-124, 2008. ,
A time-elastic time-division-multiplexed NOC using asynchronous routers, Asynchronous Circuits and Systems (ASYNC), pp.45-52, 2014. ,
, Circuit Theory and Design (ECCTD), 2015 European Conference on, p.22, 2015.
A real-time network-on-chip architecture with an efficient GALS implementation, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol.24, p.22, 2016. ,
Inter-core prefetching for multicore processors using migrating helper threads, ACM SIGPLAN Notices, vol.46, p.88, 2011. ,
, Microprocesses and Nanotechnology Conference, pp.6-7, 2001.
Analysis of federated and global scheduling for parallel real-time tasks, Real-Time Systems (ECRTS), p.32, 2014. ,
« Scheduling algorithms for multiprogramming in a hard-real-time environment, Journal of the ACM (JACM), vol.20, pp.46-61, 1973. ,
Static scheduling of synchronous data flow programs for digital signal processing, IEEE Transactions on computers, vol.100, pp.24-35, 1987. ,
, Traceability of flow information: Reconciling compiler optimizations and WCET estimation, p.14, 2014.
URL : https://hal.archives-ouvertes.fr/hal-01072138
« Timing anomalies in dynamically scheduled microprocessors, Real-time systems symposium, p.22, 1999. ,
« On the complexity of fixed-priority scheduling of periodic, real-time tasks, p.29 ,
« Scratchpad memory allocation for data aggregates via interval coloring in superperfect graphs, ACM Transactions on Embedded Computing Systems (TECS), vol.10, p.88, 2010. ,
« An OpenMP compiler for efficient use of distributed scratchpad memory in MPSoCs, Computers, IEEE Transactions on 61, vol.2, pp.222-236, 2012. ,
« Memory-processor co-scheduling in fixed priority systems, Proceedings of the 23rd International Conference on Real Time and Networks Systems, p.25, 2015. ,
« A multiframe model for real-time tasks, Real-Time Systems Symposium, pp.22-29, 1996. ,
Automated software refactoring for predictable execution on COTS embedded systems, Embedded and Real-Time Computing Systems and Applications (RTCSA), 2014. ,
, IEEE 20th International Conference on, p.25, 2014.
, Georgios Goumas, and Iraklis Anagnostopoulos, « An efficient and fair scheduling policy for multiprocessor platforms, Theodoros Marinakis, Alexandros-Herodotos Haritatos, Konstantinos Nikas, p.31, 2017.
« Quantifying WCET reduction of parallel applications by introducing slack time to limit resource contention, Proceedings of the 25th International Conference on Real-Time Networks and Systems, p.66, 2017. ,
, 2016 IEEE International Symposium on High Performance Computer Architecture (HPCA), p.88, 2016.
« A closer look into the aer model, Emerging Technologies and Factory Automation (ETFA), pp.1-8, 2016. ,
« Fundamental design problems of distributed systems for the hard-real-time environment, p.18, 1983. ,
, The GPU computing era, vol.30, p.24, 2010.
, First draft of a report on the EDVAC, p.24, 1982.
« Cache-conscious offline real-time task scheduling for multi-core processors, 29th Euromicro Conference on Real-Time Systems (ECRTS17), vol.33, p.31, 2017. ,
« Response-time analysis of arbitrarily activated tasks in multiprocessor systems with shared resources, Proceedings of the Conference on Design, Automation and Test in Europe, p.32, 2009. ,
, « Automatic WCET Analysis of Real-Time Parallel Applications, p.29, 2013.
« A predictable execution model for COTS-based embedded systems, 2011 17th IEEE Real-Time and Embedded Technology and Applications Symposium, pp.269-279, 2011. ,
Grain Iterative Compilation for WCET Estimation, 18th International Workshop on Worst-Case Execution Time Analysis (WCET 2018), vol.58, p.13, 2018. ,
URL : https://hal.archives-ouvertes.fr/hal-01889944
, , vol.30, 2017.
« Multi-task implementation of multi-periodic synchronous programs », in: Discrete event dynamic systems, vol.21, p.20, 2011. ,
« On Performance Improvement of Concurrent Applications Using Simultaneous Multithreaded Processors as NoC Resources, Norchip Conference, p.30, 2006. ,
« Off-line mapping of multirate dependent task sets to many-core platforms, Real-Time Systems, vol.51, pp.526-565, 2015. ,
DOI : 10.1007/s11241-015-9232-1
URL : http://orbit.dtu.dk/en/publications/offline-mapping-of-multirate-dependent-task-sets-to-manycore-platforms(70873fdc-78e4-4fd6-a14b-d49b95d91a41).html
« Scratchpad memories vs locked caches in hard real-time systems: a quantitative comparison, Design, Automation & Test in Europe Conference & Exhibition, 2007. DATE'07, pp.1-6, 2007. ,
« Integrated Worst-Case Execution Time Estimation of Multicore Applications, p.28, 2013. ,
, The single-path approach towards WCET-analysable software, vol.2, p.24, 2003.
DOI : 10.1109/icit.2003.1290740
, Synchronization in real-time systems: a priority inheritance approach, vol.151, p.33, 2012.
« Resource-aware task graph scheduling using ILP on multi-core, Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES), p.112, 2016. ,
« Tightening contention delays while scheduling parallel applications on multi-core architecture, 2017 International Conference on, 2017. ,
DOI : 10.1145/3126496
URL : https://hal.archives-ouvertes.fr/hal-01655383/file/TECS_2017_HAL.pdf
« Timing predictability of cache replacement policies, Real-Time Systems, vol.37, p.12, 2007. ,
DOI : 10.1007/s11241-007-9032-3
, The development of the C language, vol.28, p.24, 1993.
Refactored StreamIT benchmarks into statically analyzable parallel benchmarks for WCET estimation & realtime scheduling, 17th International Workshop on Worst-Case Execution Time Analysis (WCET 2017), vol.57, 2017. ,
URL : https://hal.archives-ouvertes.fr/hal-01590446
« Hiding communication delays in contention-free execution for SPM-based multi-core architectures ,
, Patmos reference handbook, 2015.
« A statically scheduled time-division-multiplexed network-on-chip for real-time systems, Networks on Chip (NoCS), p.22, 2012. ,
DOI : 10.1109/nocs.2012.25
URL : http://www.jopdesign.com/doc/s4noc.pdf
s law: past, present and future, IEEE spectrum, vol.34, pp.52-59, 1997. ,
« A time-predictable memory network-on-chip, 14th International Workshop on Worst-Case Execution Time Analysis, p.22, 2014. ,
« Timing analysis for TDMA arbitration in resource sharing systems, Real-Time and Embedded Technology and Applications Symposium (RTAS), 2010 16th IEEE, p.27, 2010. ,
DOI : 10.1109/rtas.2010.24
« Hierarchical scheduling framework for virtual clustering of multiprocessors, Real-Time Systems, 2008. ECRTS'08. Euromicro Conference on, p.32, 2008. ,
DOI : 10.1109/ecrts.2008.28
URL : https://repository.upenn.edu/cgi/viewcontent.cgi?article=1399&context=cis_papers
« Data cache organization for accurate timing analysis, Real-Time Systems, vol.49, p.22, 2013. ,
DOI : 10.1007/s11241-012-9159-8
URL : http://orbit.dtu.dk/files/51216860/590E1d01.pdf
« Exploring locking & partitioning for predictable shared caches on multi-cores, Design Automation Conference, vol.33, p.32, 2008. ,
« Bounding the shared resource load for the performance analysis of multiprocessor systems, Proceedings of the conference on design, automation and test in Europe, p.65, 2010. ,
« WCET-Driven dynamic data scratchpad management with compiler-directed prefetching, LIPIcs-Leibniz International Proceedings in Informatics, vol.76, p.89, 2017. ,
, Message Passing on a Time-predictable Multicore Processor, p.28, 2015.
« Real-time computing: A new discipline of computer science and engineering, Proceedings of the IEEE, vol.82, p.11, 1994. ,
« Priority inheritance protocols: An approach to real-time synchronization, IEEE Transactions, vol.39, p.33, 1990. ,
, Proceedings of the 34rd Annual ACM Symposium on Applied Computing, p.112, 2019.
« Worst-case execution time analysis for many-core architectures with NoC, International Conference on Formal Modeling and Analysis of Timed Systems, p.23, 2016. ,
« Near-optimal deployment of dataflow applications on many-core platforms with real-time guarantees, Automation & Test in Europe Conference & Exhibition (DATE), vol.89, p.31, 2017. ,
« Towards a time-predictable dual-issue microprocessor: The Patmos approach, Bringing Theory to Practice: Predictability and Performance in Embedded Systems, vol.18, pp.11-21, 2011. ,
« A metaheuristic scheduler for time division multiplexed networks-on-chip, Object/Component/Service-Oriented Real-Time Distributed Computing (ISORC), p.27, 2014. ,
« Graph-based models for real-time workload: a survey, Real-Time Systems, vol.51, pp.602-636, 2015. ,
Complexity of analyzing the synchronization structure of concurrent programs, Acta Informatica, vol.19, p.54, 1983. ,
A language for streaming applications, Compiler Construction, pp.179-196, 2002. ,
« A real-time scratchpad-centric os for multi-core embedded systems, Real-Time and Embedded Technology and Applications Symposium (RTAS), pp.1-11, 2016. ,
« Manycore scheduling of data parallel applications using SMT solvers, Ioannis Galanommatis, and Oded Maler, pp.615-622, 2014. ,
« Strictly periodic scheduling of acyclic synchronous dataflow graphs using SMT solvers, p.30, 2014. ,
« Partitioning and allocation of scratch-pad memory for priority-based preemptive multi-task systems, Design, Automation & Test in Europe Conference & Exhibition (DATE), p.88, 2010. ,
On computable numbers, with an application to the Entscheidungsproblem, Proceedings of the London mathematical society 2.1 (1937), p.24 ,
, A theorem on boolean matrices, vol.9, p.54, 1962.
« Generation of schedule tables on multi-core systems for AUTOSAR applications, Design and Architectures for Signal and Image Processing (DASIP), 2016 Conference on, pp.191-198, 2016. ,
« Investigation of scratchpad memory for preemptive multitasking, Real-Time Systems Symposium (RTSS), p.33, 2012. ,
« The worst-case execution-time problem-overview of methods and survey of tools, ACM Transactions on Embedded Computing Systems (TECS), vol.7, issue.3, p.36, 2008. ,
Markus Pister, and Christian Ferdinand, « Memory hierarchies, pipelines, and buses for future architectures in time-critical embedded systems, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.28, p.22, 2009. ,
design-time application analysis and run-time mapping for predictable execution in many-core systems, Hardware/Software Codesign and System Synthesis (CODES+ ISSS, p.30, 2014. ,
« A dynamic scratchpad memory unit for predictable real-time embedded systems, Real-Time Systems (ECRTS), p.88, 2013. ,
« Hiding memory latency using fixed priority scheduling, Real-Time and Embedded Technology and Applications Symposium (RTAS), p.89, 2014. ,
The limits of TDMA based memory access scheduling, tech. rep, p.27, 2011. ,
« An ilp formulation for task mapping and scheduling on multi-core architectures, Automation & Test in Europe Conference & Exhibition, 2009. DATE'09, p.30, 2009. ,
« Parallelism-aware memory interference delay analysis for cots multicore systems, Real-Time Systems (ECRTS), 2015 27th Euromicro Conference on, p.66, 2015. ,
« Scalable techniques for scheduling and mapping DSP applications onto embedded multicore platforms, vol.30, p.19, 2013. ,
« Execution-Efficient Response Time Analysis on Global Multiprocessor Platforms, IEEE Transactions on Parallel and Distributed Systems, p.31, 2018. ,
12 2 Illustrating example showing the importance of the execution order, Real-time is not real-fast, p.13 ,
Worst-Case Execution Times (WCET) ,
Example of an application represented by a DAG ,
, An SDF example and its transformation to HSDF and one possible PEG, p.20
,
Patmos core (left side) and its Argo NoC (right side), from, p.23 ,
Kalray core (left side) and its NoC (right side), from [DVP+14, p.24 ,
Task representation with different execution model ,
Blue filled boxes are TDM slots, granting time for the corresponding core where horizontal-lined boxes represent memory accesses as in PREM in Figure 1.7b ,
Configuration: T slot = 2 time units, D slot = 1 data-word, 3 cores Request: 5 data words gives 3 chunks. Each chunk is delayed by 2 interferences × T slot ,
,
Resulting schedule for task-graph from Figure 2.3 with a worst-case contention policy targeting a tri-core architecture equivalent to Figure 2.1. Overall makespan is 122 time units ,
Scalability of ILP formulation (synthetic task graphs / STG), p.47 ,
Distribution of the degradation of the heuristic against the ILP formulation using STG task set. (logarithmic scale) ,
Average makespan when varying T slot (synthetic task graphs / BTG), p.49 ,
, Example of adjustments that occur while scheduling. (3.3a) initial schedule of 2 tasks. (3.3b) adjusted communication delays after the addition of task G, p.61
Distribution of the degradation of the heuristic against the ILP formulation using STG task set ,
Gain in % obtained with contention-aware scenario (heuristic, STR2RTS benchmarks) ,
,
2 with a DFS sorting strategy in the heuristic algorithm ,
84 4.6 Gain of non-blocking communications over blocking on STR2RTS benchmarks per cores/SPM configuration-avg: 4%, Distribution degradation heuristic vs ILP (232 test-cases) ,
, Gain of non-blocking communications over blocking on TGFF benchmarks-average: 8%
Average gain of non-blocking schedule length over blocking one depending on fragmentation strategy ,
3.2Adjust schedule in contention-free mode : Updating the schedule to avoid contention 60 3.3.3Adjust schedule in contention-aware mode : Updating the schedule to cope with interference, p.61 ,
« Hiding communication delays in contention-free execution for SPM-based multi-core architectures, 2019. ,
, Proceedings of the 34rd Annual ACM Symposium on Applied Computing, 2019.
« Tightening contention delays while scheduling parallel applications on multi-core architecture, 2017 International Conference on, 2017. ,
DOI : 10.1145/3126496
URL : https://hal.archives-ouvertes.fr/hal-01655383/file/TECS_2017_HAL.pdf
Refactored StreamIT benchmarks into statically analyzable parallel benchmarks for WCET estimation & real-time scheduling, 17th International Workshop on Worst-Case Execution Time Analysis (WCET 2017), vol.57, 2017. ,
URL : https://hal.archives-ouvertes.fr/hal-01590446
« The Heptane Static Worst-Case Execution Time Estimation Tool, 17th International Workshop on Worst-Case Execution Time Analysis (WCET 2017), vol.8, pp.1-812, 2017. ,
« Resource-aware task graph scheduling using ILP on multi-core, Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES), 2016. ,