Monitoring of temperature effects on CMOS memories

Abstract : With the constant increase of microelectronic systems complexity and the continual scaling of transistors, reliability remains one of the main challenges. Harsh environments, with extreme conditions of high temperature and thermal cycling, alter the proper functioning of systems. For data storage devices, high temperature is considered as a main reliability threat. Therefore, it becomes essential to develop monitoring techniques to guarantee the reliability of volatile and non-volatile memories over an entire range of operating temperatures. In the frame of this thesis, I focus my studies on two types of memories: NAND Flash memories and SRAM. To monitor the effects of temperature in NAND Flash Memories, a timer-based solution is proposed in order to reduce the refresh frequency and continue to guarantee the integrity of data. For SRAM memories, the effect of temperature on Single Event Upset (SEU) sensitivity is studied. A comparative study on SEU occurrence under different temperatures is conducted for standard 6T-SRAM cells and hardened Dual Interlocked Storage Cells (DICE). Finally, statistical and computational approximation techniques based on periodic check operations are proposed in order to improve the tolerated Raw Bit Error Rate (RBER) in enterprise-class Flash based SSDs.
Document type :
Theses
Complete list of metadatas

Cited literature [99 references]  Display  Hide  Download

https://tel.archives-ouvertes.fr/tel-02139553
Contributor : Abes Star <>
Submitted on : Friday, May 24, 2019 - 6:34:11 PM
Last modification on : Thursday, June 13, 2019 - 1:20:31 AM

File

FARJALLAH_2018_archivage.pdf
Version validated by the jury (STAR)

Identifiers

  • HAL Id : tel-02139553, version 1

Collections

Citation

Emna Farjallah. Monitoring of temperature effects on CMOS memories. Other. Université Montpellier, 2018. English. ⟨NNT : 2018MONTS091⟩. ⟨tel-02139553⟩

Share

Metrics

Record views

376

Files downloads

59