hal-00661687, version 1
PRETI: Partitioned REal-TIme shared cache for mixed-criticality real-time systems.
Benjamin Lesage
a, 1Isabelle Puaut
b, 1André Seznec
c, 1
(2012)
Résumé : Multithreaded processors raise new opportunities as well as new issues in all application domains. In the context of real-time applications, it has created one major opportunity and one major difficulty. On the one hand, the concurrent execution of multiple threads creates the opportunity to mix, on the same hardware platform, the execution of a complex real-time workload and the execution of non-critical applications. On the other hand, for real-time tasks, timing deadlines must be met and enforced. Hardware resource sharing, inherent to multithreading, hinders the timing analysis of concurrent tasks. Two different objectives are pursued in this work: enforcing timing deadlines for real-time tasks, and achieving the highest possible performance for the non-critical workload. In this paper, we present the PRETI, Partitioned REal-TIme shared cache scheme, a flexible hardware- based cache partitioning scheme that aims at pursuing these two objectives at the same time. Plainly considering inter-task conflicts on shared caches for real-time tasks yields very pessimistic timing estimates. We remove this pessimism by allocating private cache space for real-time tasks. During the execution of a real-time task, our scheme reserves a fixed number of cache lines per set for the task. Therefore, uniprocessor, i.e. unithread, worst-case execution time (WCET) estimation techniques can be used, resulting in tight WCET estimates. Apart from the private spaces reserved for the real-time tasks currently running, the remaining cache space is shared by all tasks running on the processor, in particular non-critical tasks, enabling high performance for these tasks. While the PRETI cache scheme is of great help to achieving our both objectives, its hardware implementation consists only in a slight modification of the LRU cache replacement policy. Experiments are presented to show that the PRETI cache scheme allows for both guaranteeing the schedulability of a set of real-time tasks with tight timing constraints, and enabling high performance for the non-critical tasks.
- a – Université de Rennes I
- b – Université Rennes I
- c – INRIA
- 1 : ALF (INRIA - IRISA)
- INRIA – Université de Rennes 1
- Domaine : Informatique/Systèmes embarqués
- hal-00661687, version 1
- http://hal.inria.fr/hal-00661687
- oai:hal.inria.fr:hal-00661687
- Contributeur : Benjamin Lesage
- Soumis le : Vendredi 20 Janvier 2012, 14:01:05
- Dernière modification le : Mardi 31 Janvier 2012, 09:23:29






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