inria-00073056, version 1
Using Parallel Computing to Reduce CPU Power
N° RR-3621 (1999)
Résumé : In this paper, we analyze parallelism as an energy-saving technique for mobile terminal or on-board systems. We show that the expected gains are considerable. However, some natural constraints can appear when applying massively this idea. Therefore, we analyze this concept on a simple model in an environment where either the space for circuitry is restricted, or the total weight of the system, including energy sources, has to be minimized. It turns to give new types of CAD problems. Finally, we analyze fault tolerance issues and solutions in a satellite-like environment.
- 1 : SLOOP (INRIA Sophia Antipolis / Laboratoire I3S)
- INRIA – Université de Nice Sophia Antipolis (UNS) – CNRS : UMR7271
- Domaine : Informatique/Autre
- Mots-clés : PARALLELISM / ON-BOARD COMPUTATION / CPU ENERGY CONSUMPTION
- Référence interne : RR-3621
- inria-00073056, version 1
- http://hal.inria.fr/inria-00073056
- oai:hal.inria.fr:inria-00073056
- Contributeur : Rapport De Recherche Inria
- Soumis le : Mercredi 24 Mai 2006, 11:43:04
- Dernière modification le : Mercredi 31 Mai 2006, 14:24:27






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