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AADL Extension to Model Classical FPGA and FPGA Embedded within a SoC

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https://hal.inria.fr/hal-00650628
Contributor : Daniel Chillet Connect in order to contact the contributor
Submitted on : Sunday, December 11, 2011 - 9:08:56 PM
Last modification on : Tuesday, December 7, 2021 - 4:04:05 PM

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Dominique Blouin, Daniel Chillet, Eric Senn, Sebastien Bilavarn, Robin Bonamy, et al.. AADL Extension to Model Classical FPGA and FPGA Embedded within a SoC. International Journal of Reconfigurable Computing, Hindawi Publishing Corporation, 2011, Article ID 425401, 15 p. ⟨10.1155/2011/425401⟩. ⟨hal-00650628⟩

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