Virtual Platform for Embedded System Power Estimation

Abstract : In this paper, we propose a virtual platform for power estimation of processor based embedded systems. Our platform consists of a combination of Functional Level Power Analysis (FLPA) for power modeling and fast system prototyping for transactional simulation. In this proposal, we aim at esti- mating power automatically with the help of power models and SystemC IP libraries. These libraries are enriched with different power models and various hardware components required by the embedded platforms. This will allow to use our proposed virtual platform to port various hardware systems and applications in the same environment in order to satisfy the requirements of reliable and efficient design space exploration. Our experiments performed on this virtual embedded platform show that the obtained power estimation results are less than 3% of error in an average for all the processor when compared to the real board measurements.
Type de document :
Communication dans un congrès
DATE-2012, Mar 2012, Dresden, Germany. 2012
Liste complète des métadonnées

Littérature citée [1 références]  Voir  Masquer  Télécharger

https://hal.inria.fr/hal-00673911
Contributeur : Mister Dart <>
Soumis le : vendredi 24 février 2012 - 15:02:20
Dernière modification le : vendredi 30 mars 2018 - 16:12:17
Document(s) archivé(s) le : lundi 26 novembre 2012 - 10:15:52

Fichier

bare_conf.pdf
Fichiers produits par l'(les) auteur(s)

Identifiants

  • HAL Id : hal-00673911, version 1

Collections

Citation

Santhosh Kumar Rethinagiri, Rabie Ben Atitallah, Jean-Luc Dekeyser. Virtual Platform for Embedded System Power Estimation. DATE-2012, Mar 2012, Dresden, Germany. 2012. 〈hal-00673911〉

Partager

Métriques

Consultations de la notice

546

Téléchargements de fichiers

303