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Analysis and Tracing of Applications Based on Software Transactional Memory on Multicore Architectures

Marcio Bastos Castro 1 Kiril Georgiev 2 Vania Marangozova-Martin 1 Jean-François Mehaut 1 Luiz Gustavo Fernandes 3 Miguel Santana 2
1 MESCAL - Middleware efficiently scalable
Inria Grenoble - Rhône-Alpes, LIG - Laboratoire d'Informatique de Grenoble
2 ST-CROLLES - STMicroelectronics [Crolles]
3 PUCRS - Pontifícia Universidade Católica do Rio Grande do Sul [Porto Alegre]
Abstract : Transactional Memory (TM) is a new programming paradigm that offers an alternative to traditional lock-based concurrency mechanisms. It offers a higher-level programming interface and promises to greatly simplify the development of correct concurrent applications on multicore architectures. However, simplicity often comes with an important performance deterioration and given the variety of TM implementations it is still a challenge to know what kind of applications can really take advantage of TM. In order to gain some insight on these issues, helping developers to understand and improve the performance of TM applications, we propose a generic approach for collecting and tracing relevant information about transactions. Our solution can be applied to different Software Transactional Memory (STM) libraries and applications as it does not modify neither the target application nor the STM library source codes. We show that the collected information can be helpful in order to comprehend the performance of TM applications.
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Conference papers
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https://hal.inria.fr/hal-00788785
Contributor : Arnaud Legrand <>
Submitted on : Friday, February 15, 2013 - 11:16:23 AM
Last modification on : Friday, October 25, 2019 - 1:29:15 AM

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CNRS | INRIA | UGA | LIG | POLYTECH-GRENOBLE

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Marcio Bastos Castro, Kiril Georgiev, Vania Marangozova-Martin, Jean-François Mehaut, Luiz Gustavo Fernandes, et al.. Analysis and Tracing of Applications Based on Software Transactional Memory on Multicore Architectures. Euromicro International Conference on Parallel, Distributed and Network-Based Computing (PDP), 2011, Ayia Napa, Cyprus. pp.199-206, ⟨10.1109/PDP.2011.27⟩. ⟨hal-00788785⟩

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