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Tiling on systems with communication/computation overlap

Pierre-Yves Calland 1 Jack Dongarra 2 Yves Robert 1
1 REMAP - Regularity and massive parallel computing
Inria Grenoble - Rhône-Alpes, LIP - Laboratoire de l'Informatique du Parallélisme
Abstract : In the framework of fully permutable loops, tiling is a compiler technique (also known as 'loop blocking') that has been extensively studied as a source-to-source program transformation. Little work has been devoted to the mapping and scheduling of the tiles on to physical parallel processors. We present several new results in the context of limited computational resources and assuming communication-computation overlap. In particular, under some reasonable assumptions, we derive the optimal mapping and scheduling of tiles to physical processors.
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https://hal.inria.fr/hal-00856657
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Submitted on : Monday, September 2, 2013 - 10:30:10 AM
Last modification on : Saturday, September 11, 2021 - 3:17:36 AM

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  • HAL Id : hal-00856657, version 1

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Pierre-Yves Calland, Jack Dongarra, Yves Robert. Tiling on systems with communication/computation overlap. Concurrency, John Wiley & Sons, 1999, 11 (3), pp.139-153. ⟨hal-00856657⟩

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