Heterogeneous CPU/FPGA reconfigurable computing system for avionic test application

Abstract : Real-time computing systems are increasingly used in aerospace and avionic industries. In the face of power wall and real-time requirements, hardware designers are directed towards reconfigurable computing with the usage of heterogeneous CPU/FPGA systems. However, there is a lack of real-time environments able to deal with the execution of applications on such heterogeneous systems dedicated to avionic Test and Simulation (T&S). This research investigates the problem of soft real-time environments for CPU/FPGA systems and proposes first a high-performance hardware architecture used to implement intimately coupled hardware and software avionic models. Second, this paper presents the description of an efficient real-time software environment for the model's execution, the multi-core CPU monitoring and the runtime task re-allocation to avoid the timing constraint violation. Experimental results underpin the industrial relevance of the presented approach for avionic T&S systems with real-time support.
Type de document :
Communication dans un congrès
IEEE 27th International Parallel and Distributed Processing Symposium Workshops & PhD Forum (IPDPSW), May 2013, Cambridge, United Kingdom. 2013
Liste complète des métadonnées

https://hal.inria.fr/hal-00922004
Contributeur : Mister Dart <>
Soumis le : lundi 23 décembre 2013 - 09:47:28
Dernière modification le : jeudi 22 mars 2018 - 23:26:05

Identifiants

  • HAL Id : hal-00922004, version 1

Collections

Citation

George Afonso, Zeineb Baklouti, David Duvivier, Rabie Ben Atitallah, Eli Billauer, et al.. Heterogeneous CPU/FPGA reconfigurable computing system for avionic test application. IEEE 27th International Parallel and Distributed Processing Symposium Workshops & PhD Forum (IPDPSW), May 2013, Cambridge, United Kingdom. 2013. 〈hal-00922004〉

Partager

Métriques

Consultations de la notice

717