An Architecture for tolerating processor failures in shared-memory multiprocessors

Michel Banâtre 1 Alain Gefflaut 1 Philippe Joubert 1 Christine Morin 1 Pete Lee 2
1 SOLIDOR - Design of Distributed Operating Systems
IRISA - Institut de Recherche en Informatique et Systèmes Aléatoires, INRIA Rennes
2 Department of Computing Science [Newcastle]
Abstract : no abstract
Keywords : TAF FASST
Document type :
Journal articles
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https://hal.inria.fr/hal-01271108
Contributor : Christine Morin <>
Submitted on : Monday, February 8, 2016 - 6:01:30 PM
Last modification on : Friday, November 16, 2018 - 1:31:15 AM

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  • HAL Id : hal-01271108, version 1

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UNIV-RENNES1 | INRIA | IRISA | UR1-UFR-ISTIC | UNIV-RENNES | INSA-GROUPE

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Michel Banâtre, Alain Gefflaut, Philippe Joubert, Christine Morin, Pete Lee. An Architecture for tolerating processor failures in shared-memory multiprocessors. IEEE Transactions on Computers, Institute of Electrical and Electronics Engineers, 1996, 45 (10), pp.1101--1115. ⟨hal-01271108⟩

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