Skip to Main content Skip to Navigation
Conference papers

Development of a Simulink Model of a Saturated Cores Superconducting Fault Current Limiter

Abstract : Superconducting fault current limiters are considered as emerging devices for the advent of modern power grids. Those limiters as well as other electric power grid applications have been developed in the last years in order to support the increased penetration of dispersed generation. The development of such limiters requires new design tools that allows to simulate those devices in electrical power grids with different voltage ratings and characteristics. This work presents a methodology to simulate the behaviour of saturated core type limiters based on its characteristic curves. A prototype is tested to obtain its characteristic and then the methodology is implemented in Simulink. The simulation carried out by the proposed methodology is compared with a real test.
Document type :
Conference papers
Complete list of metadata

Cited literature [13 references]  Display  Hide  Download

https://hal.inria.fr/hal-01343511
Contributor : Hal Ifip <>
Submitted on : Friday, July 8, 2016 - 3:08:46 PM
Last modification on : Tuesday, July 9, 2019 - 2:48:02 PM

File

336594_1_En_44_Chapter.pdf
Files produced by the author(s)

Licence


Distributed under a Creative Commons Attribution 4.0 International License

Identifiers

Citation

Nuno Vilhena, Pedro Arsénio, João Murta-Pina, Anabela Pronto, Alfredo Álvarez. Development of a Simulink Model of a Saturated Cores Superconducting Fault Current Limiter. 6th Doctoral Conference on Computing, Electrical and Industrial Systems (DoCEIS), Apr 2015, Costa de Caparica, Portugal. pp.415-422, ⟨10.1007/978-3-319-16766-4_44⟩. ⟨hal-01343511⟩

Share

Metrics

Record views

177

Files downloads

1046