Abstract : Superconducting fault current limiters are considered as emerging devices for the advent of modern power grids. Those limiters as well as other electric power grid applications have been developed in the last years in order to support the increased penetration of dispersed generation. The development of such limiters requires new design tools that allows to simulate those devices in electrical power grids with different voltage ratings and characteristics. This work presents a methodology to simulate the behaviour of saturated core type limiters based on its characteristic curves. A prototype is tested to obtain its characteristic and then the methodology is implemented in Simulink. The simulation carried out by the proposed methodology is compared with a real test.
Luis M. Camarinha-Matos; Thais A. Baldissera; Giovanni Di Orio; Francisco Marques. 6th Doctoral Conference on Computing, Electrical and Industrial Systems (DoCEIS), Apr 2015, Costa de Caparica, Portugal. IFIP Advances in Information and Communication Technology, AICT-450, pp.415-422, 2015, Technological Innovation for Cloud-Based Engineering Systems. 〈10.1007/978-3-319-16766-4_44〉
https://hal.inria.fr/hal-01343511
Contributeur : Hal Ifip
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Soumis le : vendredi 8 juillet 2016 - 15:08:46
Dernière modification le : vendredi 8 juillet 2016 - 15:33:07
Nuno Vilhena, Pedro Arsénio, João Murta-Pina, Anabela Pronto, Alfredo Álvarez. Development of a Simulink Model of a Saturated Cores Superconducting Fault Current Limiter. Luis M. Camarinha-Matos; Thais A. Baldissera; Giovanni Di Orio; Francisco Marques. 6th Doctoral Conference on Computing, Electrical and Industrial Systems (DoCEIS), Apr 2015, Costa de Caparica, Portugal. IFIP Advances in Information and Communication Technology, AICT-450, pp.415-422, 2015, Technological Innovation for Cloud-Based Engineering Systems. 〈10.1007/978-3-319-16766-4_44〉. 〈hal-01343511〉
