Skip to Main content Skip to Navigation
Conference papers

Low-Power Low-Voltage ΔΣ Modulator Using Switched-Capacitor Passive Filters

Abstract : A low-voltage low-power fourth-order active-passive ΔΣ modulator with one active stage is presented. The input-feedforward architecture is adopted, which improves the voltage swing prior to the quantizer. This enables a simpler comparator design and cascade of three passive filters. The passive integrator, as an alternate option to its power-hungry active counterpart, and the non-idealities associated with it are investigated. The active integrator used at the input stage provides most of the loop gain, which suppresses the thermal noise from the succeeding stages and minimizes the non-idealities in the comparator, such as noise and offset. The active integrator employs a two-stage amplifier with load compensation, whose DC-gain is boosted by a partially body-driven technique. The modulator, operated from a 0.7 V supply and clocked with 256 kHz sampling frequency, achieves 84 dB SNR and 80.3 dB SNDR over a 500 Hz signal bandwidth, while it dissipates only 400 nW power.
Document type :
Conference papers
Complete list of metadata

Cited literature [23 references]  Display  Hide  Download

https://hal.inria.fr/hal-01380300
Contributor : Hal Ifip <>
Submitted on : Wednesday, October 12, 2016 - 5:39:58 PM
Last modification on : Thursday, May 13, 2021 - 8:24:02 PM
Long-term archiving on: : Saturday, February 4, 2017 - 8:35:52 PM

File

367527_1_En_5_Chapter.pdf
Files produced by the author(s)

Licence


Distributed under a Creative Commons Attribution 4.0 International License

Identifiers

Citation

Ali Yeknami, Atila Alvandpour. Low-Power Low-Voltage ΔΣ Modulator Using Switched-Capacitor Passive Filters. 21th IFIP/IEEE International Conference on Very Large Scale Integration - System on a Chip (VLSI-SoC), Oct 2013, Istanbul, Turkey. pp.94-118, ⟨10.1007/978-3-319-23799-2_5⟩. ⟨hal-01380300⟩

Share

Metrics

Record views

181

Files downloads

1418