Symbolic computation of the latency for dataflow graphs

Abstract : We present the symbolic computation of data-flow graphs latency, with two variants: the multi-iteration latency and the input-output latency. These are important timing constraints that are usually used in the design of real-time control systems. The input-output latency is particularly useful for real-time control systems since it is the maximum delay between sampling data from sensors and sending control commands to the actuators. Latency analysis can either be performed at compile time, for design space exploration, or at run-time, for resource management and reconfigurable systems. However, this analysis has an exponential time complexity, which may cause a huge run-time overhead or make design space exploration unacceptably slow. We propose to compute the latency symbolically, i.e., as a function of parameters of the given data-flow graph. By parameters, we mean the input and output rates of the data-flow actors, as well as their execution times. Such functions can be quickly evaluated for each different configuration or checked w.r.t. different quality-of-service requirements.
Type de document :
Communication dans un congrès
Integrating Dataflow, Embedded computing and Architecture (IDEA'2016), Apr 2016, Vienne, Austria. 2016
Liste complète des métadonnées

https://hal.inria.fr/hal-01417111
Contributeur : Pascal Fradet <>
Soumis le : jeudi 15 décembre 2016 - 12:08:19
Dernière modification le : vendredi 16 décembre 2016 - 16:11:32

Identifiants

  • HAL Id : hal-01417111, version 1

Collections

Citation

Adnan Bouakaz, Pascal Fradet, Alain Girault. Symbolic computation of the latency for dataflow graphs. Integrating Dataflow, Embedded computing and Architecture (IDEA'2016), Apr 2016, Vienne, Austria. 2016. <hal-01417111>

Partager

Métriques

Consultations de la notice

92