Abstract : The operation of a novel unified memory device using two floating-gates is described through experimental characterization of a fabricated proof-of-concept device and confirmed through simulation. The dynamic, nonvolatile, and concurrent modes of the device are described in detail. Simulations show that the device compares favorably to conventional memory devices. Applications enabled by this unified memory device are discussed, highlighting the dramatic impact this device could have on next generation memory architectures.
https://hal.inria.fr/hal-01456958
Contributor : Hal Ifip
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Neil Spigna, Daniel Schinke, Srikant Jayanti, Veena Misra, Paul Franzon. Simulation and Experimental Characterization of a Unified Memory Device with Two Floating-Gates. 20th International Conference on Very Large Scale Integration (VLSI-SoC), Aug 2012, Santa Cruz, CA, United States. pp.217-233, ⟨10.1007/978-3-642-45073-0_12⟩. ⟨hal-01456958⟩
